Patents by Inventor Bernardino Zerbini

Bernardino Zerbini has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Process for manufacturing micromechanical components in a semiconductor material wafer with reduction in the starting wafer thickness
    Patent number: 6689627
    Abstract: A process for manufacturing components in a multi-layer wafer, including the steps of: providing a multi-layer wafer comprising a first semiconductor material layer, a second semiconductor material layer (, and a dielectric material layer arranged between the first and the second semiconductor material layer; and removing the first semiconductor material layer initially by mechanically thinning the first semiconductor material layer, so as to form a residual conductive layer, and subsequently by chemically removing the residual conductive layer. In one application, the multi-layer wafer is bonded to a first wafer of semiconductor material, with the second semiconductor material layer facing the first wafer, after micro-electromechanical structures have been formed in the second semiconductor material layer of the multi-layer wafer.
    Type: Grant
    Filed: December 19, 2001
    Date of Patent: February 10, 2004
    Assignee: STMicroelectronics S.r.l.
    Inventors: Marta Mottura, Alessandra Fischetti, Marco Ferrera, Bernardino Zerbini, Mauro Bombonati
  • Process for manufacturing components in a semiconductor material wafer with reduction in the starting wafer thickness
    Publication number: 20020127761
    Abstract: A process for manufacturing components in a multi-layer wafer, including the steps of: providing a multi-layer wafer comprising a first semiconductor material layer, a second semiconductor material layer (, and a dielectric material layer arranged between the first and the second semiconductor material layer; and removing the first semiconductor material layer initially by mechanically thinning the first semiconductor material layer, so as to form a residual conductive layer, and subsequently by chemically removing the residual conductive layer. In one application, the multi-layer wafer is bonded to a first wafer of semiconductor material, with the second semiconductor material layer facing the first wafer, after micro-electromechanical structures have been formed in the second semiconductor material layer of the multi-layer wafer.
    Type: Application
    Filed: December 19, 2001
    Publication date: September 12, 2002
    Applicant: STMicroelectronics S.r.I.
    Inventors: Marta Mottura, Alessandra Fischetti, Marco Ferrera, Bernardino Zerbini, Mauro Bombonati