Patents by Inventor Bernhard H. Adresen

Bernhard H. Adresen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5487093
    Abstract: An autoranging digital/analog (D/A) phase locked loop (PLL) 10 includes a frequency discriminator circuit 12 connected to a shift register 14. Shift register 14 is connected to a voltage controlled oscillator circuit (VCO) 16. VCO 16 is connected to generic counter 17. Counter 17 is optional in this preferred embodiment. Counter 17 is connected to a phase detector 13 and frequency discriminator 12. Phase detector 13 is connected to a charge pump control circuit 15. Charge pump control circuit 15 is also connected to VCO 16. A second generic counter 11 is connected to frequency discriminator 12. Second counter 11 is also optional in this preferred embodiment. First generic counter 17 and second generic counter 11 can be implemented to reduce the phase detector frequency relative to VCO 16 or a reference clock signal frequency. Ratios of M to N allow frequency multiplication or division of VCO 16 relative to the reference clock signal frequency.
    Type: Grant
    Filed: May 26, 1994
    Date of Patent: January 23, 1996
    Assignee: Texas Instruments Incorporated
    Inventors: Bernhard H. Adresen, Roger A. Cline