Patents by Inventor Bernice L. Kickel

Bernice L. Kickel has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6573141
    Abstract: The present invention provides a method for improving the quality of thin oxides formed upon a semiconductor body. The etch and pre-clean processes are performed in situ, taking place in a single apparatus. This reduces the amount of handling of the wafers, their exposure to clean room air, and time delays between clean and oxidation. This results in both a higher yield and greater reliability. In addition, it reduces equipment requirements. The etch, employing a buffered oxide etchant, resist strip, and pre-clean, all occur in a single apparatus without transfer, yielding better results, despite the inherently dirty nature of the resist strip, than the traditional technique of transferring to a new apparatus for each of these steps. The improvements are particularly important for thin oxides such as the tunnel oxides of EEPROMs.
    Type: Grant
    Filed: March 12, 1999
    Date of Patent: June 3, 2003
    Assignee: ZiLOG, Inc.
    Inventors: Bernice L. Kickel, John A. Smythe, III
  • Patent number: 6190973
    Abstract: The present invention provides a method of forming a high quality thin oxide on a semiconductor body. A sacrificial oxide is formed on the semiconductor and then etched to eliminate the surface contamination of the semiconductor body. Then, an EEPROM oxide is formed following by an arsenic implant. Next the EEPROM oxide on the semiconductor body is then prepared by thin oxide growth. The thin oxide is preferably formed in a steam ambient. Subsequently, the oxide is annealed under nitrous oxide ambient using a combination of in-situ and RTP annealing process.
    Type: Grant
    Filed: December 18, 1998
    Date of Patent: February 20, 2001
    Assignee: Zilog Inc.
    Inventors: John E. Berg, Bernice L. Kickel, John A. Smythe, III
  • Patent number: 6165846
    Abstract: The improvement of thin tunnel oxides used in EEPROM and FLASH tecnologies using post-oxidation annealing in nitrogen causes defects in subsequent oxide films. These are manifested by oxide thinning at the bird's beak and result in high gate leakage. As the time and temperature to the post-oxidation annealing are increased for improved tunnel oxide performance, the number of defects increases rapidly. A method of realizing the improved tunnel oxide Q.sub.BD using higher post-oxidation time and temperature annealing while at the same time not degrading the quality of subsequent gate oxides is shown. The use of sacrificial oxidation and strip just prior to the transistor gate oxidation is described. This process removes the additional nitride which exists at the field edges, leading to the oxide thinning. As a result, improved tunnel oxide integrity can be achieved without degradation of high and low voltage transistors.
    Type: Grant
    Filed: March 2, 1999
    Date of Patent: December 26, 2000
    Assignee: Zilog, Inc.
    Inventors: Timothy K. Carns, John A. Smythe, III, John A. Ransom, Bernice L. Kickel, John E. Berg