Patents by Inventor Bert Sullam
Bert Sullam has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8639850Abstract: A method for implementing an addressing scheme may include mapping a digital peripheral function to one or more contiguous configurable blocks in an array of configurable blocks; and assigning a memory address from a plurality of memory addresses to at least one register of each of the one or more contiguous configurable blocks based on an access mode width of the digital peripheral function and a width of each of the one or more contiguous configurable blocks.Type: GrantFiled: February 2, 2012Date of Patent: January 28, 2014Assignee: Cypress Semiconductor Corp.Inventor: Bert Sullam
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Publication number: 20140013022Abstract: A programmable routing scheme provides improved connectivity both between Universal Digital Blocks (UDBs) and between the UDBs and other micro-controller elements, peripherals and external Inputs and Outputs (I/Os) in the same Integrated Circuit (IC). The routing scheme increases the number of functions, flexibility, and the overall routing efficiency for programmable architectures. The UDBs can be grouped in pairs and share associated horizontal routing channels. Bidirectional horizontal and vertical segmentation elements extend routing both horizontally and vertically between different UDB pairs and to the other peripherals and I/O.Type: ApplicationFiled: June 28, 2013Publication date: January 9, 2014Inventors: Warren Snyder, Bert Sullam, Haneef Mohammed
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Patent number: 8601254Abstract: A programmable system includes an input/output (I/O) pin that is configurable into multiple operational states. The programmable system further includes a memory device to store configuration data that, when provided to the I/O pin, causes the I/O pin to reconfigure into one of the operational states. When power is supplied to the system, the memory device is configured to provide the configuration data to the I/O pin prior to a system microcontroller becoming operational responsive to the power.Type: GrantFiled: April 13, 2010Date of Patent: December 3, 2013Assignee: Cypress Semiconductor Corp.Inventors: Harold Kutz, Timothy Williams, Bert Sullam, Robert W. Metzler, Craig Nemecek, Eric Blom, Melany Richmond, Warren Snyder, David G. Wright, Jeffrey Erickson, Greg Verge
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Patent number: 8598908Abstract: A method and apparatus to provide random access to a programmable logic register. A processing device in a programmable logic system retrieves data from a memory of the programmable logic system. The data is loaded into a configuration register configured to store configuration data for a programmable logic function over a system bus. The processing device programs a programmable logic block to implement the programmable logic function based on the configuration data, where the processing device is configured to access a first configuration register in the configuration register set, the first configuration register corresponding to a first programmable logic block in the programmable logic system, without affecting a second configuration register corresponding to a second programmable logic block.Type: GrantFiled: May 3, 2010Date of Patent: December 3, 2013Assignee: Cypress Semiconductor Corp.Inventors: Bert Sullam, Warren Snyder
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Patent number: 8516025Abstract: A system includes a plurality of datapaths, each having structural arithmetic elements to perform various arithmetic operations based, at least in part, on configuration data. The system also includes a configuration memory coupled to the datapaths, the configuration memory to provide the configuration data to the datapaths, which causes the datapaths to collaborate when performing the arithmetic operations.Type: GrantFiled: April 16, 2008Date of Patent: August 20, 2013Assignee: Cypress Semiconductor CorporationInventors: Warren Synder, Bert Sullam
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Patent number: 8487655Abstract: A system and apparatus are described for providing greater flexibility and performance in a mixed-signal array through improved and highly configurable routing, control elements and signal processing capabilities.Type: GrantFiled: May 5, 2010Date of Patent: July 16, 2013Assignee: Cypress Semiconductor CorporationInventors: Harold Kutz, Timothy Williams, Bert Sullam, Warren S. Snyder, James Shutt, Bruce Byrkett, Monte Mar, Eashwar Thiagarajan, Nathan Kohagen, David G. Wright, Mark Hastings, Dennis Seguine
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Patent number: 8482313Abstract: A programmable routing scheme provides improved connectivity both between Universal Digital Blocks (UDBs) and between the UDBs and other micro-controller elements, peripherals and external Inputs and Outputs (I/Os) in the same Integrated Circuit (IC). The routing scheme increases the number of functions, flexibility, and the overall routing efficiency for programmable architectures. The UDBs can be grouped in pairs and share associated horizontal routing channels. Bidirectional horizontal and vertical segmentation elements extend routing both horizontally and vertically between different UDB pairs and to the other peripherals and I/O.Type: GrantFiled: May 2, 2011Date of Patent: July 9, 2013Assignee: Cypress Semiconductor CorporationInventors: Warren Snyder, Bert Sullam, Haneef Mohammed
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Patent number: 8476928Abstract: Different functional elements are all located on a same integrated circuit wherein at least one of the functional elements comprises a micro-controller. Configuration registers or configuration memory in the integrated circuit store configuration values loaded by the micro-controller. Connectors are configured to connect the integrated circuit to external signals A system level interconnect also located in the integrated circuit programmably connects together the different functional elements and different connectors according to the configuration values loaded into the configuration registers.Type: GrantFiled: August 3, 2011Date of Patent: July 2, 2013Assignee: Cypress Semiconductor CorporationInventors: Bert Sullam, Warren Snyder, Haneef Mohammed
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Patent number: 8402313Abstract: One disclosed system and method enables dynamic reconfiguration of an electronic device in association with testing activities in a convenient and efficient manner. In one implementation, the electronic device includes a bus for communicating information, a microprocessor for processing data, a programmable functional component including a plurality of functional blocks programmable to provide a plurality of functions and configurations, and a memory for storing instructions including instructions for causing the programmable functional component to change functions and configurations. The components are programmably configurable to perform a variety of functions. In one example, the memory stores a plurality of configuration images that define the configuration and functionality of the circuit. The information stored in the memory facilitates dynamic reconfiguration of the circuit in accordance with the test harness instructions.Type: GrantFiled: November 20, 2007Date of Patent: March 19, 2013Assignee: Cypress Semiconductor CorporationInventors: Matthew A. Pleis, Bert Sullam, Todd Lesher
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Patent number: 8250249Abstract: A programmable system includes a core processing unit to perform various data operations. The programmable system includes a transceiver having programmable analog and digital devices that, when initially configured by the programmable system, receive and collect status information of other programmable systems independently of the data operations performed by the core processing unit.Type: GrantFiled: July 24, 2009Date of Patent: August 21, 2012Assignee: Cypress Semiconductor CorporationInventors: Gaurang Kavaiya, Rick Harding, Mark Ainsworth, Bert Sullam
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Patent number: 8135884Abstract: A method and apparatus for a programmable interrupt routing system is described.Type: GrantFiled: May 4, 2010Date of Patent: March 13, 2012Assignee: Cypress Semiconductor CorporationInventors: Bert Sullam, Haneef Mohammed
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Patent number: 8125360Abstract: A system for the calibration of a programmable system-on-a-chip is described. More specifically, embodiments of the present invention relate to a system that calibrates a programmable analog block in a system-on-a-chip without the use of external components.Type: GrantFiled: May 10, 2010Date of Patent: February 28, 2012Assignee: Cypress Semiconductor CorporationInventors: Harold Kutz, Warren Synder, Bert Sullam, Dennis Seguine, Gajender Rohilla, Eashwar Thiagarajan
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Patent number: 8112551Abstract: A programmable processing device comprises a plurality of universal digital blocks (UDBs) in a UDB linear array. Each register in each UDB is associated with a plurality of memory addresses, where each memory address is from each of the different memory address spaces associated with different access mode widths of different digital peripheral functions. A digital peripheral function of an access mode width is mapped to one or more contiguous UDBs starting with a first UDB in the UDB linear array. Based on the access mode width, one of the associated memory addresses is chosen for the first UDB.Type: GrantFiled: May 7, 2010Date of Patent: February 7, 2012Assignee: Cypress Semiconductor CorporationInventor: Bert Sullam
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Patent number: 8026739Abstract: Different functional elements are all located on a same integrated circuit wherein at least one of the functional elements comprises a micro-controller. Configuration registers or configuration memory in the integrated circuit store configuration values loaded by the micro-controller. Connectors are configured to connect the integrated circuit to external signals. A system level interconnect also located in the integrated circuit programmably connects together the different functional elements and different connectors according to the configuration values loaded into the configuration registers.Type: GrantFiled: December 27, 2007Date of Patent: September 27, 2011Assignee: Cypress Semiconductor CorporationInventors: Bert Sullam, Warren Snyder, Haneef Mohammed
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Publication number: 20110026519Abstract: An integrated circuit device may include a reconfigurable analog signal switching fabric comprising a plurality of global buses that are selectively connected to external pins by pin connection circuits in response to changeable analog routing data, and a plurality of local buses that are selectively connected to analog blocks and/or global buses by routing connection circuits in response to the analog routing data; and at least one processor circuit that executes predetermined operations in response to instruction data.Type: ApplicationFiled: May 7, 2010Publication date: February 3, 2011Applicant: CYPRESS SEMICONDUCTOR CORPORATIONInventors: Bert Sullam, Harold Kutz, Timothy Williams, James Shutt, Bruce E. Byrkett, Melany Ann Richmond, Nathan Kohagen, Mark Hastings, Eashwar Thiagarajan, Warren Snyder
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Publication number: 20100287334Abstract: A programmable processing device comprises a plurality of universal digital blocks (UDBs) in a UDB linear array. Each register in each UDB is associated with a plurality of memory addresses, where each memory address is from each of the different memory address spaces associated with different access mode widths of different digital peripheral functions. A digital peripheral function of an access mode width is mapped to one or more contiguous UDBs starting with a first UDB in the UDB linear array. Based on the access mode width, one of the associated memory addresses is chosen for the first UDB.Type: ApplicationFiled: May 7, 2010Publication date: November 11, 2010Inventor: Bert Sullam
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Publication number: 20100281145Abstract: A programmable system includes a programmable analog system that is reconfigurable to perform various analog operations, and includes a programmable digital system that is reconfigurable to perform various digital operations. The programmable system also includes a microcontroller capable of reconfiguring and controlling the programmable analog system and the programmable digital system. The programmable digital system is configured to control the programmable analog system autonomously of the microcontroller.Type: ApplicationFiled: April 22, 2010Publication date: November 4, 2010Applicant: CYPRESS SEMICONDUCTOR CORPORATIONInventors: Bert Sullam, Harold Kutz, Monte Mar, Eashwar Thiagaragen
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Patent number: 7737724Abstract: A programmable routing scheme provides improved connectivity both between Universal Digital Blocks (UDBs) and between the UDBs and other micro-controller elements, peripherals and external Inputs and Outputs (I/Os) in the same Integrated Circuit (IC). The routing scheme increases the number of functions, flexibility, and the overall routing efficiency for programmable architectures. The UDBs can be grouped in pairs and share associated horizontal routing channels. Bidirectional horizontal and vertical segmentation elements extend routing both horizontally and vertically between different UDB pairs and to the other peripherals and I/O.Type: GrantFiled: December 27, 2007Date of Patent: June 15, 2010Assignee: Cypress Semiconductor CorporationInventors: Warren Snyder, Bert Sullam, Haneef Mohammed
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Patent number: 7555664Abstract: Power management commands are provided to a power management unit of a processing device, wherein the power management unit coupled to a core system block of the processing device. Sampling of the core system block is performed in response to the power management commands by the power management unit, wherein sampling includes periodically powering the core system block.Type: GrantFiled: January 31, 2006Date of Patent: June 30, 2009Assignee: Cypress Semiconductor Corp.Inventor: Bert Sullam
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Patent number: 7479913Abstract: A configurable analog to digital converter (ADC) includes a plurality of analog units to integrate an input signal. The analog units are coupled together to generate a plurality of discrete-time signals responsive to the input signal and are further coupled to a plurality of bus segments via a plurality of interconnect circuits. Each interconnect circuit is configured to selectively couple the analog units to any of the bus segments.Type: GrantFiled: February 7, 2007Date of Patent: January 20, 2009Assignee: Cypress Semiconductor CorporationInventors: Eashwar Thiagarajan, Bert Sullam