Abstract: Circuits comprising: a capacitor; switches that, when State0, couple the capacitor in parallel with the load and, when State1, couple the capacitor in series with the load, wherein a first of the switches connects the capacitor to ground when in State0 and wherein a second of the switches connects the capacitor to an input voltage when in State1; a third switch, wherein a first side of the third switch is connected to the capacitor identically to one of the first switch and the second switch (OFWSW), wherein the third switch switches identically to the OFWSW, wherein the third switch is smaller than the OFWSW; a first resistor connected to the second side of the third switch; and a hardware processor that measures a current flowing through the first resistor and estimates the current provided to the load based on the current measured as flowing through the first resistor.

Abstract: Circuits comprising: a capacitor; switches that, when State0, couple the capacitor in parallel with the load and, when State1, couple the capacitor in series with the load, wherein a first of the switches connects the capacitor to ground when in State0 and wherein a second of the switches connects the capacitor to an input voltage when in State1; a third switch, wherein a first side of the third switch is connected to the capacitor identically to one of the first switch and the second switch (OFWSW), wherein the third switch switches identically to the OFWSW, wherein the third switch is smaller than the OFWSW; a first resistor connected to the second side of the third switch; and a hardware processor that measures a current flowing through the first resistor and estimates the current provided to the load based on the current measured as flowing through the first resistor.

Abstract: A voltage regulator system, comprising: a switched capacitor (SC) regulator that operates at a switching frequency and receives an input voltage; and a controller configured to control an operation of the SC regulator by adjusting the switching frequency of the SC regulator based on efficiency. In some embodiments, the switching frequency is swept to determine a best efficiency. In some embodiments, the switching frequency is swept at each of a plurality of values for the input voltage. In some embodiments, the system includes further one or more switches in series with the SC regulator. In some embodiments, the SC regulator includes an output terminal that is coupled to a battery.

Abstract: A voltage regulator system, comprising: a switched capacitor (SC) regulator that operates at a switching frequency and receives an input voltage; and a controller configured to control an operation of the SC regulator by adjusting the switching frequency of the SC regulator based on efficiency. In some embodiments, the switching frequency is swept to determine a best efficiency. In some embodiments, the switching frequency is swept at each of a plurality of values for the input voltage. In some embodiments, the system includes further one or more switches in series with the SC regulator. In some embodiments, the SC regulator includes an output terminal that is coupled to a battery.

Abstract: An embodiment of a charger may include an input, at least one switch having a first node coupled to a reference voltage, a current sensor coupled between the input and a second node of the at least one switch, an output coupled to a third node of the at least one switch, and a charge controller coupled to the input to determine an input voltage, to the current sensor to determine an input current and to control inputs of the at least one switch. The at least one switch may be responsive to control signals supplied by the charge controller to the control inputs thereof to control voltage and current at the output of the charger. The charge controller may be responsive to the input voltage and the input current to produce the control signals in a manner that maximizes electrical power drawn at the input.

Abstract: An embodiment of a charger may include an input, at least one switch having a first node coupled to a reference voltage, a current sensor coupled between the input and a second node of the at least one switch, an output coupled to a third node of the at least one switch, and a charge controller coupled to the input to determine an input voltage, to the current sensor to determine an input current and to control inputs of the at least one switch. The at least one switch may be responsive to control signals supplied by the charge controller to the control inputs thereof to control voltage and current at the output of the charger. The charge controller may be responsive to the input voltage and the input current to produce the control signals in a manner that maximizes electrical power drawn at the input.

Abstract: An embodiment of a charger may include an input, at least one switch having a first node coupled to a reference voltage, a current sensor coupled between the input and a second node of the at least one switch, an output coupled to a third node of the at least one switch, and a charge controller coupled to the input to determine an input voltage, to the current sensor to determine an input current and to control inputs of the at least one switch. The at least one switch may be responsive to control signals supplied by the charge controller to the control inputs thereof to control voltage and current at the output of the charger. The charge controller may be responsive to the input voltage and the input current to produce the control signals in a manner that maximizes electrical power drawn at the input.

Abstract: Circuits, methods, and apparatus that provide waveforms having controlled rise and fall times, as well as accurate peak voltages. One embodiment provides circuitry for generating a clock signal and a current that are adjusted for an on-chip capacitance variation. This current is then used to generate rising and falling edges of a waveform. The clock signal is used to determine timing of transitions in the waveform. A bandgap or similar reference voltage is used to determine the peak voltage. This waveform is then gained using an amplifier circuit, and the output of the amplifier circuit is used as a programming voltage waveform for an EE-PROM. One embodiment further uses non-overlapping clocks to drive a charge pump that is used to generate a supply voltage for the amplifier circuit that far exceeds the available on-chip supply voltages.

Abstract: Circuit methods, and apparatus that provide waveforms having controlled rise and fall times, as well as accurate peak voltages. One embodiment provides circuitry for generating a clock signal and a current that are adjusted for an on-chip capacitance variation. This current is then used to generate rising and falling edges of a waveform. The clock signal is used to determine timing of transitions in the waveform. A bandgap or similar reference voltage is used to determine the peak voltage. This waveform is then gained using an amplifier circuit, and the output of the amplifier circuit is used as a programming voltage waveform for an EE-PROM. One embodiment further uses non-overlapping clocks to drive a charge pump that is used to generate a supply voltage for the amplifier circuit that far exceeds the available on-chip supply voltages.

Abstract: A digital compensation circuit for calibrating a sensor includes a serial communication circuit for receiving data relating to a plurality of parameters and a plurality of registers coupled to the serial communication circuit; one of plurality of registers for reading temperature information. The digital compensation circuit further includes a digital trim circuit for adjusting the temperature information in the one of plurality of registers to a predetermined value at an initial calibration temperature. Finally, the digital compensation circuit further includes means responsive to the digital trim circuit for measuring gain and offset at a predetermined value of the physical parameter being measured.