Abstract: An embodiment of a charger may include an input, at least one switch having a first node coupled to a reference voltage, a current sensor coupled between the input and a second node of the at least one switch, an output coupled to a third node of the at least one switch, and a charge controller coupled to the input to determine an input voltage, to the current sensor to determine an input current and to control inputs of the at least one switch. The at least one switch may be responsive to control signals supplied by the charge controller to the control inputs thereof to control voltage and current at the output of the charger. The charge controller may be responsive to the input voltage and the input current to produce the control signals in a manner that maximizes electrical power drawn at the input.

Abstract: An embodiment of a charger may include an input, at least one switch having a first node coupled to a reference voltage, a current sensor coupled between the input and a second node of the at least one switch, an output coupled to a third node of the at least one switch, and a charge controller coupled to the input to determine an input voltage, to the current sensor to determine an input current and to control inputs of the at least one switch. The at least one switch may be responsive to control signals supplied by the charge controller to the control inputs thereof to control voltage and current at the output of the charger. The charge controller may be responsive to the input voltage and the input current to produce the control signals in a manner that maximizes electrical power drawn at the input.

Abstract: An embodiment of a charger may include an input, at least one switch having a first node coupled to a reference voltage, a current sensor coupled between the input and a second node of the at least one switch, an output coupled to a third node of the at least one switch, and a charge controller coupled to the input to determine an input voltage, to the current sensor to determine an input current and to control inputs of the at least one switch. The at least one switch may be responsive to control signals supplied by the charge controller to the control inputs thereof to control voltage and current at the output of the charger. The charge controller may be responsive to the input voltage and the input current to produce the control signals in a manner that maximizes electrical power drawn at the input.

Abstract: Circuits, methods, and apparatus that provide waveforms having controlled rise and fall times, as well as accurate peak voltages. One embodiment provides circuitry for generating a clock signal and a current that are adjusted for an on-chip capacitance variation. This current is then used to generate rising and falling edges of a waveform. The clock signal is used to determine timing of transitions in the waveform. A bandgap or similar reference voltage is used to determine the peak voltage. This waveform is then gained using an amplifier circuit, and the output of the amplifier circuit is used as a programming voltage waveform for an EE-PROM. One embodiment further uses non-overlapping clocks to drive a charge pump that is used to generate a supply voltage for the amplifier circuit that far exceeds the available on-chip supply voltages.

Abstract: Circuit methods, and apparatus that provide waveforms having controlled rise and fall times, as well as accurate peak voltages. One embodiment provides circuitry for generating a clock signal and a current that are adjusted for an on-chip capacitance variation. This current is then used to generate rising and falling edges of a waveform. The clock signal is used to determine timing of transitions in the waveform. A bandgap or similar reference voltage is used to determine the peak voltage. This waveform is then gained using an amplifier circuit, and the output of the amplifier circuit is used as a programming voltage waveform for an EE-PROM. One embodiment further uses non-overlapping clocks to drive a charge pump that is used to generate a supply voltage for the amplifier circuit that far exceeds the available on-chip supply voltages.

Abstract: A digital compensation circuit for calibrating a sensor includes a serial communication circuit for receiving data relating to a plurality of parameters and a plurality of registers coupled to the serial communication circuit; one of plurality of registers for reading temperature information. The digital compensation circuit further includes a digital trim circuit for adjusting the temperature information in the one of plurality of registers to a predetermined value at an initial calibration temperature. Finally, the digital compensation circuit further includes means responsive to the digital trim circuit for measuring gain and offset at a predetermined value of the physical parameter being measured.