Patents by Inventor Bhargav S. CITLA

Bhargav S. CITLA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11972943
    Abstract: Methods and apparatus for depositing a dielectric material include: providing a first gas mixture into a processing chamber having a substrate disposed therein; forming a first remote plasma comprising first radicals in a remote plasma source and delivering the first radicals to an interior processing region in the processing chamber to form a layer of dielectric material in an opening in a material layer disposed on the substrate in a presence of the first gas mixture and the first radicals; terminating the first remote plasma and applying a first RF bias power to the processing chamber to form a first bias plasma; contacting the layer of dielectric material with the first bias plasma to form a first treated layer of dielectric material; and subsequently forming a second remote plasma comprising second radicals in the remote plasma source and delivering the second radicals to the interior processing region in the processing chamber in a presence of a second gas mixture while applying a second RF bias power t
    Type: Grant
    Filed: September 20, 2019
    Date of Patent: April 30, 2024
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Bhargav S. Citla, Jethro Tannos, Srinivas D Nemani, Joshua Rubnitz
  • Publication number: 20240038527
    Abstract: A method includes depositing a flowable film on a substrate by providing a first input flow, the first input flow including plasma effluents of a first precursor, removing a portion of the flowable film from a sidewall of a feature defined within the substrate to obtain a remaining portion of the flowable film by providing a second input flow, the second input flow including plasma effluents of a second precursor, reducing hydrogen content of the remaining portion of the flowable film to obtain a densified film by providing a third input flow, the third input flow including plasma effluents of a third precursor, and treating the densified film in accordance with a film treatment process.
    Type: Application
    Filed: July 26, 2022
    Publication date: February 1, 2024
    Inventors: Bhargav S. Citla, Srinivas D. Nemani, Purvam Modi, Ellie Y. Yieh
  • Patent number: 11862458
    Abstract: Exemplary processing methods may include forming a plasma of a silicon-containing precursor. The methods may include depositing a flowable film on a semiconductor substrate with plasma effluents of the silicon-containing precursor. The processing region may be at least partially defined between a faceplate and a substrate support on which the semiconductor substrate is seated. A bias power may be applied to the substrate support from a bias power source. The methods may include forming a plasma of a hydrogen-containing precursor within the processing region of the semiconductor processing chamber. The methods may include etching the flowable film from a sidewall of the feature within the semiconductor substrate with plasma effluents of the hydrogen-containing precursor. The methods may include densifying remaining flowable film within the feature defined within the semiconductor substrate with plasma effluents of the hydrogen-containing precursor.
    Type: Grant
    Filed: September 8, 2021
    Date of Patent: January 2, 2024
    Assignee: Applied Materials, Inc.
    Inventors: Bhargav S. Citla, Soham Asrani, Joshua Rubnitz, Srinivas D. Nemani, Ellie Y. Yieh
  • Publication number: 20230386829
    Abstract: Embodiments of the disclosure relate to methods for forming silicon based gapfill within substrate features. A flowable silicon film is formed within the feature with a greater thickness on the bottom and top surfaces than the sidewall surface. An etch plasma removes the silicon film from the sidewall surface. A conversion plasma is used to convert the silicon film to a silicon based gapfill (e.g., silicon oxide). In some embodiments, the silicon film is preferentially converted on the top and bottom surface before being etched from the sidewall surface.
    Type: Application
    Filed: May 27, 2022
    Publication date: November 30, 2023
    Applicant: Applied Materials, Inc.
    Inventors: Soham Asrani, Bhargav S. Citla, Srinivas D. Nemani, Ellie Y. Yieh
  • Publication number: 20230377875
    Abstract: Exemplary processing methods may include forming a plasma of a silicon-containing precursor. The methods may include depositing a flowable film on a semiconductor substrate with plasma effluents of the silicon-containing precursor. The processing region may be at least partially defined between a faceplate and a substrate support on which the semiconductor substrate is seated. A bias power may be applied to the substrate support from a bias power source. The methods may include forming a plasma of a hydrogen-containing precursor within the processing region of the semiconductor processing chamber. The methods may include etching the flowable film from a sidewall of the feature within the semiconductor substrate with plasma effluents of the hydrogen-containing precursor. The methods may include densifying remaining flowable film within the feature defined within the semiconductor substrate with plasma effluents of the hydrogen-containing precursor.
    Type: Application
    Filed: August 2, 2023
    Publication date: November 23, 2023
    Applicant: Applied Materials, Inc.
    Inventors: Bhargav S. Citla, Soham Asrani, Joshua Rubnitz, Srinivas D. Nemani, Ellie Y. Yieh
  • Patent number: 11798606
    Abstract: One or more embodiments described herein generally relate to patterning semiconductor film stacks. Unlike in conventional embodiments, the film stacks herein are patterned without the need of etching the magnetic tunnel junction (MTJ) stack. Instead, the film stack is etched before the MTJ stack is deposited such that the spin on carbon layer and the anti-reflective coating layer are completely removed and a trench is formed within the dielectric capping layer and the oxide layer. Thereafter, MTJ stacks are deposited on the buffer layer and on the dielectric capping layer. An oxide capping layer is deposited such that it covers the MTJ stacks. An oxide fill layer is deposited over the oxide capping layer and the film stack is polished by chemical mechanical polishing (CMP). The embodiments described herein advantageously result in no damage to the MTJ stacks since etching is not required.
    Type: Grant
    Filed: May 24, 2021
    Date of Patent: October 24, 2023
    Assignee: APPLIED MATERIALS, INC.
    Inventors: John O. Dukovic, Srinivas D. Nemani, Ellie Y. Yieh, Praburam Gopalraja, Steven Hiloong Welch, Bhargav S. Citla
  • Patent number: 11631591
    Abstract: Methods for depositing a dielectric material using RF bias pulses along with remote plasma source deposition for manufacturing semiconductor devices, particularly for filling openings with high aspect ratios in semiconductor applications are provided. For example, a method of depositing a dielectric material includes providing a gas mixture into a processing chamber having a substrate disposed therein, forming a remote plasma in a remote plasma source and delivering the remote plasma to an interior processing region defined in the processing chamber, applying a RF bias power to the processing chamber in pulsed mode, and forming a dielectric material in an opening defined in a material layer disposed on the substrate in the presence of the gas mixture and the remote plasma.
    Type: Grant
    Filed: August 23, 2021
    Date of Patent: April 18, 2023
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Bhargav S. Citla, Jethro Tannos, Jingyi Li, Douglas A. Buchberger, Jr., Zhong Qiang Hua, Srinivas D. Nemani, Ellie Y. Yieh
  • Publication number: 20230071366
    Abstract: Exemplary processing methods may include forming a plasma of a silicon-containing precursor. The methods may include depositing a flowable film on a semiconductor substrate with plasma effluents of the silicon-containing precursor. The processing region may be at least partially defined between a faceplate and a substrate support on which the semiconductor substrate is seated. A bias power may be applied to the substrate support from a bias power source. The methods may include forming a plasma of a hydrogen-containing precursor within the processing region of the semiconductor processing chamber. The methods may include etching the flowable film from a sidewall of the feature within the semiconductor substrate with plasma effluents of the hydrogen-containing precursor. The methods may include densifying remaining flowable film within the feature defined within the semiconductor substrate with plasma effluents of the hydrogen-containing precursor.
    Type: Application
    Filed: September 8, 2021
    Publication date: March 9, 2023
    Applicant: Applied Materials, Inc.
    Inventors: Bhargav S. Citla, Soham Asrani, Joshua Rubnitz, Srinivas D. Nemani, Ellie Y. Yieh
  • Publication number: 20230066497
    Abstract: Methods for plasma enhanced chemical vapor deposition (PECVD) of silicon carbonitride films are described. A flowable silicon carbonitride film is formed on a substrate surface by exposing the substrate surface to a precursor and a reactant, the precursor having a structure of general formula (I) or general formula (II) wherein R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, and R12 are independently selected from hydrogen (H), substituted or unsubstituted alkyl, substituted or unsubstituted alkoxy, substituted or unsubstituted vinyl, silane, substituted or unsubstituted amine, or halide; purging the processing chamber of the silicon precursor, and then exposing the substrate to an ammonia plasma.
    Type: Application
    Filed: November 1, 2022
    Publication date: March 2, 2023
    Applicant: Applied Materials, Inc.
    Inventors: Mei-Yee Shek, Bhargav S. Citla, Joshua Rubnitz, Jethro Tannos, Chentsau Chris Ying, Srinivas D. Nemani, Ellie Y. Yieh
  • Patent number: 11581183
    Abstract: Embodiments described herein provide for post deposition anneal of a substrate, having an amorphous carbon layer deposited thereon, to desirably reduce variations in local stresses thereacross. In one embodiment, a method of processing a substrate includes positioning a substrate, having an amorphous carbon layer deposited thereon, in a first processing volume, flowing an anneal gas into the first processing volume, heating the substrate to an anneal temperature of not more than about 450° C., and maintaining the substrate at the anneal temperature for about 30 seconds or more. Herein, the amorphous carbon layer was deposited on the substrate using a method which included positioning the substrate on a substrate support disposed in a second processing volume, flowing a processing gas into the second processing volume, applying pulsed DC power to a carbon target disposed in the second processing volume, forming a plasma of the processing gas, and depositing the amorphous carbon layer on the substrate.
    Type: Grant
    Filed: March 4, 2021
    Date of Patent: February 14, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Bhargav S. Citla, Mei-Yee Shek, Srinivas D. Nemani
  • Patent number: 11566325
    Abstract: Methods for plasma enhanced chemical vapor deposition (PECVD) of silicon carbonitride films are described. A flowable silicon carbonitride film is formed on a substrate surface by exposing the substrate surface to a precursor and a reactant, the precursor having a structure of general formula (I) or general formula (II) wherein R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, and R12 are independently selected from hydrogen (H), substituted or unsubstituted alkyl, substituted or unsubstituted alkoxy, substituted or unsubstituted vinyl, silane, substituted or unsubstituted amine, or halide; purging the processing chamber of the silicon precursor, and then exposing the substrate to an ammonia plasma.
    Type: Grant
    Filed: December 14, 2020
    Date of Patent: January 31, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Mei-Yee Shek, Bhargav S. Citla, Joshua Rubnitz, Jethro Tannos, Chentsau Chris Ying, Srinivas D. Nemani, Ellie Y. Yieh
  • Publication number: 20210384040
    Abstract: Embodiments of the present invention provide an apparatus and methods for depositing a dielectric material using RF bias pulses along with remote plasma source deposition for manufacturing semiconductor devices, particularly for filling openings with high aspect ratios in semiconductor applications. In one embodiment, a method of depositing a dielectric material includes providing a gas mixture into a processing chamber having a substrate disposed therein, forming a remote plasma in a remote plasma source and delivering the remote plasma to an interior processing region defined in the processing chamber, applying a RF bias power to the processing chamber in pulsed mode, and forming a dielectric material in an opening defined in a material layer disposed on the substrate in the presence of the gas mixture and the remote plasma.
    Type: Application
    Filed: August 23, 2021
    Publication date: December 9, 2021
    Inventors: Bhargav S. CITLA, Jethro TANNOS, Jingyi LI, Douglas A. BUCHBERGER, JR., Zhong Qiang HUA, Srinivas D. NEMANI, Ellie Y. YIEH
  • Publication number: 20210305501
    Abstract: One or more embodiments described herein generally relate to patterning semiconductor film stacks. Unlike in conventional embodiments, the film stacks herein are patterned without the need of etching the magnetic tunnel junction (MTJ) stack. Instead, the film stack is etched before the MTJ stack is deposited such that the spin on carbon layer and the anti-reflective coating layer are completely removed and a trench is formed within the dielectric capping layer and the oxide layer. Thereafter, MTJ stacks are deposited on the buffer layer and on the dielectric capping layer. An oxide capping layer is deposited such that it covers the MTJ stacks. An oxide fill layer is deposited over the oxide capping layer and the film stack is polished by chemical mechanical polishing (CMP). The embodiments described herein advantageously result in no damage to the MTJ stacks since etching is not required.
    Type: Application
    Filed: May 24, 2021
    Publication date: September 30, 2021
    Inventors: John O. DUKOVIC, Srinivas D. NEMANI, Ellie Y. YIEH, Praburam GOPALRAJA, Steven Hiloong WELCH, Bhargav S. CITLA
  • Patent number: 11049731
    Abstract: A method of converting films is disclosed. A method of modifying films is also disclosed. Some methods advantageously convert films from a first elemental composition to a second elemental composition. Some methods advantageously modify film properties without modifying film composition.
    Type: Grant
    Filed: September 27, 2019
    Date of Patent: June 29, 2021
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Erica Chen, Chentsau Chris Ying, Bhargav S. Citla, Jethro Tannos, Matthew August Mattson
  • Patent number: 11049537
    Abstract: One or more embodiments described herein generally relate to patterning semiconductor film stacks. Unlike in conventional embodiments, the film stacks herein are patterned without the need of etching the magnetic tunnel junction (MTJ) stack. Instead, the film stack is etched before the MTJ stack is deposited such that the spin on carbon layer and the anti-reflective coating layer are completely removed and a trench is formed within the dielectric capping layer and the oxide layer. Thereafter, MTJ stacks are deposited on the buffer layer and on the dielectric capping layer. An oxide capping layer is deposited such that it covers the MTJ stacks. An oxide fill layer is deposited over the oxide capping layer and the film stack is polished by chemical mechanical polishing (CMP). The embodiments described herein advantageously result in no damage to the MTJ stacks since etching is not required.
    Type: Grant
    Filed: July 29, 2019
    Date of Patent: June 29, 2021
    Assignee: Applied Materials, Inc.
    Inventors: John O. Dukovic, Srinivas D. Nemani, Ellie Y. Yieh, Praburam Gopalraja, Steven Hiloong Welch, Bhargav S. Citla
  • Publication number: 20210193461
    Abstract: Embodiments described herein provide for post deposition anneal of a substrate, having an amorphous carbon layer deposited thereon, to desirably reduce variations in local stresses thereacross. In one embodiment, a method of processing a substrate includes positioning a substrate, having an amorphous carbon layer deposited thereon, in a first processing volume, flowing an anneal gas into the first processing volume, heating the substrate to an anneal temperature of not more than about 450° C., and maintaining the substrate at the anneal temperature for about 30 seconds or more. Herein, the amorphous carbon layer was deposited on the substrate using a method which included positioning the substrate on a substrate support disposed in a second processing volume, flowing a processing gas into the second processing volume, applying pulsed DC power to a carbon target disposed in the second processing volume, forming a plasma of the processing gas, and depositing the amorphous carbon layer on the substrate.
    Type: Application
    Filed: March 4, 2021
    Publication date: June 24, 2021
    Inventors: Bhargav S. CITLA, Mei-Yee SHEK, Srinivas D. NEMANI
  • Publication number: 20210189555
    Abstract: Methods for plasma enhanced chemical vapor deposition (PECVD) of silicon carbonitride films are described. A flowable silicon carbonitride film is formed on a substrate surface by exposing the substrate surface to a precursor and a reactant, the precursor having a structure of general formula (I) or general formula (II) wherein R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, and R12 are independently selected from hydrogen (H), substituted or unsubstituted alkyl, substituted or unsubstituted alkoxy, substituted or unsubstituted vinyl, silane, substituted or unsubstituted amine, or halide; purging the processing chamber of the silicon precursor, and then exposing the substrate to an ammonia plasma.
    Type: Application
    Filed: December 14, 2020
    Publication date: June 24, 2021
    Applicant: Applied Materials, Inc.
    Inventors: Mei-Yee Shek, Bhargav S. Citla, Joshua Rubnitz, Jethro Tannos, Chentsau Chris Ying, Srinivas D. Nemani, Ellie Y. Yieh
  • Publication number: 20210090883
    Abstract: Methods and apparatus for depositing a dielectric material include: providing a first gas mixture into a processing chamber having a substrate disposed therein; forming a first remote plasma comprising first radicals in a remote plasma source and delivering the first radicals to an interior processing region in the processing chamber to form a layer of dielectric material in an opening in a material layer disposed on the substrate in a presence of the first gas mixture and the first radicals; terminating the first remote plasma and applying a first RF bias power to the processing chamber to form a first bias plasma; contacting the layer of dielectric material with the first bias plasma to form a first treated layer of dielectric material; and subsequently forming a second remote plasma comprising second radicals in the remote plasma source and delivering the second radicals to the interior processing region in the processing chamber in a presence of a second gas mixture while applying a second RF bias power t
    Type: Application
    Filed: September 20, 2019
    Publication date: March 25, 2021
    Inventors: Bhargav S. Citla, Jethro Tannos, Srinivas D. Nemani, Joshua Rubnitz
  • Patent number: 10950429
    Abstract: Embodiments described herein provide for post deposition anneal of a substrate, having an amorphous carbon layer deposited thereon, to desirably reduce variations in local stresses thereacross. In one embodiment, a method of processing a substrate includes positioning a substrate, having an amorphous carbon layer deposited thereon, in a first processing volume, flowing an anneal gas into the first processing volume, heating the substrate to an anneal temperature of not more than about 450° C., and maintaining the substrate at the anneal temperature for about 30 seconds or more. Herein, the amorphous carbon layer was deposited on the substrate using a method which included positioning the substrate on a substrate support disposed in a second processing volume, flowing a processing gas into the second processing volume, applying pulsed DC power to a carbon target disposed in the second processing volume, forming a plasma of the processing gas, and depositing the amorphous carbon layer on the substrate.
    Type: Grant
    Filed: April 26, 2019
    Date of Patent: March 16, 2021
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Bhargav S. Citla, Mei-Yee Shek, Srinivas D. Nemani
  • Publication number: 20210035619
    Abstract: One or more embodiments described herein generally relate to patterning semiconductor film stacks. Unlike in conventional embodiments, the film stacks herein are patterned without the need of etching the magnetic tunnel junction (MTJ) stack. Instead, the film stack is etched before the MTJ stack is deposited such that the spin on carbon layer and the anti-reflective coating layer are completely removed and a trench is formed within the dielectric capping layer and the oxide layer. Thereafter, MTJ stacks are deposited on the buffer layer and on the dielectric capping layer. An oxide capping layer is deposited such that it covers the MTJ stacks. An oxide fill layer is deposited over the oxide capping layer and the film stack is polished by chemical mechanical polishing (CMP). The embodiments described herein advantageously result in no damage to the MTJ stacks since etching is not required.
    Type: Application
    Filed: July 29, 2019
    Publication date: February 4, 2021
    Inventors: John O. DUKOVIC, Srinivas D. NEMANI, Ellie Y. YIEH, Praburam GOPALRAJA, Steven Hiloong WELCH, Bhargav S. CITLA