Patents by Inventor Bhavesh Davda
Bhavesh Davda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 10452580Abstract: The current document is directed to methods and systems that provide remote direct memory access (“RDMA”) to applications running within execution environments provided by guest operating systems and virtual machines above a virtualization layer. In one implementation, RDMA is accessed by application programs within virtual machines through a paravirtual interface that includes a virtual RDMA driver that transmits RDMA requests through a communications interface to a virtual RDMA endpoint in the virtualization layer.Type: GrantFiled: March 26, 2013Date of Patent: October 22, 2019Assignee: VMware, Inc.Inventors: Bhavesh Davda, Adit Uday Ranadive
-
Patent number: 10417174Abstract: A method of managing remote direct memory access (RDMA) to a virtual computing instance includes suspending locally initiated RDMA operations of the virtual computing instance executing on a first host prior to a migration of the virtual computing instance to a second host. The first host includes a first hypervisor and the second host includes a second hypervisor. The method further includes requesting a peer to suspend remotely initiated RDMA operations that target the virtual computing instance through a first channel, establishing after the migration, a second channel between the peer and the second hypervisor that supports execution of the virtual computing instance on the second host, configuring a virtual object of the second hypervisor on the second host to use the second channel for the locally initiated RDMA operations, and requesting the peer to resume the remotely initiated RDMA operations using the second channel.Type: GrantFiled: June 24, 2016Date of Patent: September 17, 2019Assignee: VMware, Inc.Inventors: Adit Ranadive, Aditya Sarwade, Andy King, Jorgen Hansen, Bhavesh Davda, George Zhang, Xiaoyun Gong
-
Patent number: 10061724Abstract: Latency reduction for direct memory access operations involving address translation is disclosed. Example methods disclosed herein to perform direct memory access (DMA) operations include initializing a ring of descriptors, the descriptors to index respective buffers for storing received data in a first memory. Such example methods also include causing prefetching of a first address translation associated with a second descriptor in the ring of descriptors to be performed after a first DMA operation is performed to store first received data in a first buffer indexed by a first descriptor in the ring of descriptors and before second received data to be stored in the first memory is received, the first address translation being associated with a second DMA operation for storing the second received data in the first memory.Type: GrantFiled: October 3, 2016Date of Patent: August 28, 2018Assignee: VMware, Inc.Inventors: Bhavesh Davda, Benjamin C. Serebrin
-
Patent number: 9898430Abstract: Techniques for tracking, by a host system, virtual machine (VM) memory modified by a physical input/output (I/O) device that supports I/O virtualization are provided. In one embodiment, a hypervisor of the host system can receive a hardware interrupt from the physical I/O device, where the hardware interrupt indicates that a virtual function (VF) of the physical I/O device has completed a direct memory access (DMA) write to a guest memory space of a VM running on the host system. In response to the hardware interrupt, the hypervisor can invoke a function implemented by a physical function (PF) driver of the physical I/O device, where the function is configured to inspect the VF's state in order to identify memory portions modified by the DMA write. The hypervisor can then mark, in a hypervisor-level page table, one or more memory pages corresponding to the identified memory portions as dirty pages.Type: GrantFiled: November 12, 2014Date of Patent: February 20, 2018Assignee: VMware, Inc.Inventors: Bhavesh Davda, Xin Xu, Guolin Yang
-
Publication number: 20170371835Abstract: A method of managing remote direct memory access (RDMA) to a virtual computing instance includes suspending locally initiated RDMA operations of the virtual computing instance executing on a first host prior to a migration of the virtual computing instance to a second host. The first host includes a first hypervisor and the second host includes a second hypervisor. The method further includes requesting a peer to suspend remotely initiated RDMA operations that target the virtual computing instance through a first channel, establishing after the migration, a second channel between the peer and the second hypervisor that supports execution of the virtual computing instance on the second host, configuring a virtual object of the second hypervisor on the second host to use the second channel for the locally initiated RDMA operations, and requesting the peer to resume the remotely initiated RDMA operations using the second channel.Type: ApplicationFiled: June 24, 2016Publication date: December 28, 2017Inventors: Adit RANADIVE, Aditya SARWADE, Andy KING, Jorgen HANSEN, Bhavesh DAVDA, George ZHANG, Xiaoyun GONG
-
Patent number: 9571450Abstract: Embodiments provide a network address translation (NAT) service for network devices. A network connection from at least one private network device to the NAT service is received and a network connection from at least one remote device to the NAT service is received. The private network device is positioned within a private network and the remote device is positioned within a public network. A network availability of the remote device is determined. If the remote device is unavailable or a network configuration setting associated with the remote device changes, the private network device is notified and a connection reset message is transmitted to the private network device.Type: GrantFiled: August 19, 2014Date of Patent: February 14, 2017Assignee: VMware, Inc.Inventors: Nithin Bangalore Raju, Scott J. Goldman, Anupam Chanda, Bhavesh Davda
-
Publication number: 20170024341Abstract: Latency reduction for direct memory access operations involving address translation is disclosed. Example methods disclosed herein to perform direct memory access (DMA) operations include initializing a ring of descriptors, the descriptors to index respective buffers for storing received data in a first memory. Such example methods also include causing prefetching of a first address translation associated with a second descriptor in the ring of descriptors to be performed after a first DMA operation is performed to store first received data in a first buffer indexed by a first descriptor in the ring of descriptors and before second received data to be stored in the first memory is received, the first address translation being associated with a second DMA operation for storing the second received data in the first memory.Type: ApplicationFiled: October 3, 2016Publication date: January 26, 2017Inventors: Bhavesh DAVDA, Benjamin C. SEREBRIN
-
Patent number: 9460024Abstract: Latency reduction for direct memory access operations involving address translation is disclosed. Example methods disclosed herein to perform direct memory access (DMA) operations include initializing a ring of descriptors, the descriptors to index respective buffers for storing received data in a first memory. Such example methods also include causing prefetching of a first address translation associated with a second descriptor in the ring of descriptors to be performed after a first DMA operation is performed to store first received data in a first buffer indexed by a first descriptor in the ring of descriptors and before second received data to be stored in the first memory is received, the first address translation being associated with a second DMA operation for storing the second received data in the first memory.Type: GrantFiled: May 30, 2013Date of Patent: October 4, 2016Assignee: VMware, Inc.Inventors: Bhavesh Davda, Benjamin Charles Serebrin
-
Publication number: 20160132443Abstract: Techniques for tracking, by a host system, virtual machine (VM) memory modified by a physical input/output (I/O) device that supports I/O virtualization are provided. In one embodiment, a hypervisor of the host system can receive a hardware interrupt from the physical I/O device, where the hardware interrupt indicates that a virtual function (VF) of the physical I/O device has completed a direct memory access (DMA) write to a guest memory space of a VM running on the host system. In response to the hardware interrupt, the hypervisor can invoke a function implemented by a physical function (PF) driver of the physical I/O device, where the function is configured to inspect the VF's state in order to identify memory portions modified by the DMA write. The hypervisor can then mark, in a hypervisor-level page table, one or more memory pages corresponding to the identified memory portions as dirty pages.Type: ApplicationFiled: November 12, 2014Publication date: May 12, 2016Inventors: Bhavesh Davda, Xin Xu, Guolin Yang
-
Patent number: 9317444Abstract: Latency reduction for direct memory access operations involving address translation is disclosed. Example methods disclosed herein to perform direct memory access (DMA) operations include initializing a ring of descriptors, the descriptors to index respective buffers for storing, in a first memory, data to be transmitted. Such example methods also include causing prefetching of a first address translation associated with a second descriptor in the ring of descriptors to be performed after a first DMA operation is performed to retrieve, for transmission, first data from a first buffer indexed by a first descriptor in the ring of descriptors and before second data is determined to be ready for transmission, the first address translation being associated with a second DMA operation for retrieving the second data from the first memory.Type: GrantFiled: May 30, 2013Date of Patent: April 19, 2016Assignee: VMware, Inc.Inventors: Bhavesh Davda, Benjamin Charles Serebrin
-
Publication number: 20140359093Abstract: Embodiments provide a network address translation (NAT) service for network devices. A network connection from at least one private network device to the NAT service is received and a network connection from at least one remote device to the NAT service is received. The private network device is positioned within a private network and the remote device is positioned within a public network. A network availability of the remote device is determined. If the remote device is unavailable or a network configuration setting associated with the remote device changes, the private network device is notified and a connection reset message is transmitted to the private network device.Type: ApplicationFiled: August 19, 2014Publication date: December 4, 2014Inventors: Nithin Bangalore RAJU, Scott J. GOLDMAN, Anupam CHANDA, Bhavesh DAVDA
-
Publication number: 20140297775Abstract: The current document is directed to methods and systems that provide remote direct memory access (“RDMA”) to applications running within execution environments provided by guest operating systems and virtual machines above a virtualization layer. In one implementation, RDMA is accessed by application programs within virtual machines through a paravirtual interface that includes a virtual RDMA driver that transmits RDMA requests through a communications interface to a virtual RDMA endpoint in the virtualization layer.Type: ApplicationFiled: March 26, 2013Publication date: October 2, 2014Applicant: VMware, Inc.Inventors: Bhavesh Davda, Adit Uday Ranadive
-
Publication number: 20140281055Abstract: Latency reduction for direct memory access operations involving address translation is disclosed. Example methods disclosed herein to perform direct memory access (DMA) operations include initializing a ring of descriptors, the descriptors to index respective buffers for storing received data in a first memory. Such example methods also include causing prefetching of a first address translation associated with a second descriptor in the ring of descriptors to be performed after a first DMA operation is performed to store first received data in a first buffer indexed by a first descriptor in the ring of descriptors and before second received data to be stored in the first memory is received, the first address translation being associated with a second DMA operation for storing the second received data in the first memory.Type: ApplicationFiled: May 30, 2013Publication date: September 18, 2014Inventors: Bhavesh Davda, Benjamin Charles Serebrin
-
Publication number: 20140281056Abstract: Latency reduction for direct memory access operations involving address translation is disclosed. Example methods disclosed herein to perform direct memory access (DMA) operations include initializing a ring of descriptors, the descriptors to index respective buffers for storing, in a first memory, data to be transmitted. Such example methods also include causing prefetching of a first address translation associated with a second descriptor in the ring of descriptors to be performed after a first DMA operation is performed to retrieve, for transmission, first data from a first buffer indexed by a first descriptor in the ring of descriptors and before second data is determined to be ready for transmission, the first address translation being associated with a second DMA operation for retrieving the second data from the first memory.Type: ApplicationFiled: May 30, 2013Publication date: September 18, 2014Inventors: Bhavesh Davda, Benjamin Charles Serebrin