Patents by Inventor Bhavin Jariwala

Bhavin Jariwala has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11869770
    Abstract: Methods, systems, and computer programs are presented for selective deposition of etch-stop layers for enhanced patterning during semiconductor manufacturing. One method includes an operation for adding a photo-resist material (M2) on top of a base material (M1) of a substrate, M2 defining a pattern for etching M1 in areas where M2 is not present above M1. The method further includes operations for conformally capping the substrate with an oxide material (M3) after adding M2, and for gap filling the substrate with filling material M4 after the conformally capping. Further, a stop-etch material (M5) is selectively grown on exposed surfaces of M3 and not on surfaces of M4 after the gap filling. Additionally, the method includes operations for removing M4 from the substrate after selectively growing M5, and for etching the substrate after removing M4 to transfer the pattern into M1. M5 adds etching protection to enable deeper etching into M1.
    Type: Grant
    Filed: July 29, 2021
    Date of Patent: January 9, 2024
    Assignee: Lam Research Corporation
    Inventors: Nagraj Shankar, Kapu Sirish Reddy, Jon Henri, Pengyi Zhang, Elham Mohimi, Bhavin Jariwala, Arpan Pravin Mahorowala
  • Publication number: 20210358753
    Abstract: Methods, systems, and computer programs are presented for selective deposition of etch-stop layers for enhanced patterning during semiconductor manufacturing. One method includes an operation for adding a photo-resist material (M2) on top of a base material (M1) of a substrate, M2 defining a pattern for etching M1 in areas where M2 is not present above M1. The method further includes operations for conformally capping the substrate with an oxide material (M3) after adding M2, and for gap tilling the substrate with filling material M4 after the conformally capping. Further, a stop-etch material (M5) is selectively grown on exposed surfaces of M3 and not on surfaces of M4 after the gap filling. Additionally, the method includes operations for removing M4 from the substrate after selectively growing M5, and for etching the substrate after removing M4 to transfer the pattern into M1. M5 adds etching protection to enable deeper etching into M1.
    Type: Application
    Filed: July 29, 2021
    Publication date: November 18, 2021
    Inventors: Nagraj Shankar, Kapu Sirish Reddy, Jon Henri, Pengyi Zhang, Elham Mohimi, Bhavin Jariwala, Arpan Pravin Mahorowala
  • Patent number: 11094542
    Abstract: Methods, systems, and computer programs are presented for selective deposition of etch-stop layers for enhanced patterning during semiconductor manufacturing. One method includes an operation for adding a photo-resist material (M2) on top of a base material (M1) of a substrate, M2 defining a pattern for etching M1 in areas where M2 is not present above M1. The method further includes operations for conformally capping the substrate with an oxide material (M3) after adding M2, and for gap filling the substrate with filling material M4 after the conformally capping. Further, a stop-etch material (M5) is selectively grown on exposed surfaces of M3 and not on surfaces of M4 after the gap filling. Additionally, the method includes operations for removing M4 from the substrate after selectively growing M5, and for etching the substrate after removing M4 to transfer the pattern into M1. M5 adds etching protection to enable deeper etching into M1.
    Type: Grant
    Filed: January 15, 2020
    Date of Patent: August 17, 2021
    Assignee: Lam Research Corporation
    Inventors: Nagraj Shankar, Kapu Sirish Reddy, Jon Henri, Pengyi Zhang, Elham Mohimi, Bhavin Jariwala, Arpan Pravin Mahorowala
  • Publication number: 20200168466
    Abstract: Methods, systems, and computer programs are presented for selective deposition of etch-stop layers for enhanced patterning during semiconductor manufacturing. One method includes an operation for adding a photo-resist material (M2) on top of a base material (M1) of a substrate, M2 defining a pattern for etching M1 in areas where M2 is not present above M1. The method further includes operations for conformally capping the substrate with an oxide material (M3) after adding M2, and for gap filling the substrate with filling material M4 after the conformally capping. Further, a stop-etch material (M5) is selectively grown on exposed surfaces of M3 and not on surfaces of M4 after the gap filling. Additionally, the method includes operations for removing M4 from the substrate after selectively growing M5, and for etching the substrate after removing M4 to transfer the pattern into M1. M5 adds etching protection to enable deeper etching into M1.
    Type: Application
    Filed: January 15, 2020
    Publication date: May 28, 2020
    Inventors: Nagraj Shankar, Kapu Sirish Reddy, Jon Henri, Pengyi Zhang, Elham Mohimi, Bhavin Jariwala, Arpan Pravin Mahorowala
  • Patent number: 10566194
    Abstract: Methods, systems, and computer programs are presented for selective deposition of etch-stop layers for enhanced patterning during semiconductor manufacturing. One method includes an operation for adding a photo-resist material (M2) on top of a base material (M1) of a substrate, M2 defining a pattern for etching M1 in areas where M2 is not present above M1. The method further includes operations for conformally capping the substrate with an oxide material (M3) after adding M2, and for gap filling the substrate with filling material M4 after the conformally capping. Further, a stop-etch material (M5) is selectively grown on exposed surfaces of M3 and not on surfaces of M4 after the gap filling. Additionally, the method includes operations for removing M4 from the substrate after selectively growing M5, and for etching the substrate after removing M4 to transfer the pattern into M1. M5 adds etching protection to enable deeper etching into M1.
    Type: Grant
    Filed: May 7, 2018
    Date of Patent: February 18, 2020
    Assignee: Lam Research Corporation
    Inventors: Nagraj Shankar, Kapu Sirish Reddy, Jon Henri, Pengyi Zhang, Elham Mohimi, Bhavin Jariwala, Arpan Pravin Mahorowala
  • Publication number: 20190341256
    Abstract: Methods, systems, and computer programs are presented for selective deposition of etch-stop layers for enhanced patterning during semiconductor manufacturing. One method includes an operation for adding a photo-resist material (M2) on top of a base material (M1) of a substrate, M2 defining a pattern for etching M1 in areas where M2 is not present above M1. The method further includes operations for conformally capping the substrate with an oxide material (M3) after adding M2, and for gap filling the substrate with filling material M4 after the conformally capping. Further, a stop-etch material (M5) is selectively grown on exposed surfaces of M3 and not on surfaces of M4 after the gap filling. Additionally, the method includes operations for removing M4 from the substrate after selectively growing M5, and for etching the substrate after removing M4 to transfer the pattern into M1. M5 adds etching protection to enable deeper etching into M1.
    Type: Application
    Filed: May 7, 2018
    Publication date: November 7, 2019
    Inventors: Nagraj Shankar, Kapu Sirish Reddy, Jon Henri, Pengyi Zhang, Elham Mohimi, Bhavin Jariwala, Arpan Pravin Mahorowala