Patents by Inventor Bibo Chen

Bibo Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240076277
    Abstract: A system and method for preparing epoxy chloropropane is provided in that by coupling three stages of high gravity reactors, the product epoxy chloropropane and water vapor are distilled from a reaction system in form of an azeotrope by adopting a water vapor steam stripping method. Further, by combining the azeotrope with the multiples stages of high gravity reactors, the gas phase mass transfer and the liquid phase mass transfer of the azeotrope are improved aiming at the features of the azeotrope in the reaction system, thus making the overall conversion rate higher. In addition, by combining steam stripping and high gravity, dichloropropanol and alkali solution are rapidly mixed for mass transfer, and the product epoxy chloropropane is rapidly distilled from the reaction system in the form of the azeotrope, such that the reaction proceeds continuously towards the direction of producing epoxy chloropropane, thus significantly improving the conversion rate.
    Type: Application
    Filed: December 24, 2021
    Publication date: March 7, 2024
    Inventors: Liangliang ZHANG, Liyang ZHOU, Guangwen CHU, Bibo XIA, Jianfeng CHEN, Yutu JIANG, Jihong TONG, Baochang SUN, Wei MAO, Yanchun ZHENG
  • Patent number: 6865694
    Abstract: A CPU-based system 10 and method for testing embedded memory. The technique employs the on-chip CPU 20 itself to test the embedded memory 24. An assembly code program is loaded into the device under test (DUT) 12 to test the memories, determine a repair solution, and write out the repair solution and raw failure information to the tester for defect analysis. The test is driven by an external programmable clock that is provided by the tester to allow the DUT 12 to run up to its maximum input clock rate in order to maximize throughput. The test is not dependent on the pattern rate of the tester.
    Type: Grant
    Filed: April 30, 2002
    Date of Patent: March 8, 2005
    Assignee: Texas Instruments Incorporated
    Inventors: Nicholas H. Schutt, James M. Jarboe, Jr., Bibo Chen
  • Publication number: 20030204782
    Abstract: A CPU-based system 10 and method for testing embedded memory. The technique employs the on-chip CPU 20 itself to test the embedded memory 24. An assembly code program is loaded into the device under test (DUT) 12 to test the memories, determine a repair solution, and write out the repair solution and raw failure information to the tester for defect analysis. The test is driven by an external programmable clock that is provided by the tester to allow the DUT 12 to run up to its maximum input clock rate in order to maximize throughput. The test is not dependent on the pattern rate of the tester.
    Type: Application
    Filed: April 30, 2002
    Publication date: October 30, 2003
    Inventors: Nicholas H. Schutt, James M. Jarboe, Bibo Chen