Patents by Inventor Bijitendra Mittra

Bijitendra Mittra has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and system for debugging metastability in digital circuits
    Patent number: 11892504
    Abstract: Systems and methods of debugging a design under test for metastability issues using formal verification. In one aspect, the method includes determining, by a server, that a functionality of the DUT failed an assertion; generating, by the server, a plurality of first waveforms for a plurality of clock domain crossing (CDC) pairs that are in a cone of influence of the assertion; applying, by the server, a constraint including a condition to the plurality of waveforms; and generating, by the server, one or more second waveforms for a first subset of the plurality of CDC pairs, wherein the first subset of the CDC pairs satisfied the condition.
    Type: Grant
    Filed: September 22, 2022
    Date of Patent: February 6, 2024
    Assignee: Cadence Design Systems, Inc.
    Inventors: Alberto Arias Drake, Bijitendra Mittra, Keyliane da Silva Fernandes Silvano