Abstract: The present disclosure provides a bidirectional controllable overrunning clutch for a powertrain of a motor vehicle, with the powertrain including a gear having ratchet teeth. The clutch includes a pawl movable to a disengaged position, a locked position, and a transition state where the pawl permits the gear to rotate in the forward direction and where rotation of the gear in the reverse direction moves the pawl to the locked position. The clutch further includes a spring for moving the pawl to the disengaged position. The clutch further includes an actuator configured to hold the pawl in the transition state when the gear rotates in the forward direction and the locked position when the gear changes rotation from the forward direction to the reverse direction.

Abstract: The present disclosure provides a bidirectional controllable overrunning clutch for a powertrain of a motor vehicle, with the powertrain including a gear having ratchet teeth. The clutch includes a pawl movable to a disengaged position, a locked position, and a transition state where the pawl permits the gear to rotate in the forward direction and where rotation of the gear in the reverse direction moves the pawl to the locked position. The clutch further includes a spring for moving the pawl to the disengaged position. The clutch further includes an actuator configured to hold the pawl in the transition state when the gear rotates in the forward direction and the locked position when the gear changes rotation from the forward direction to the reverse direction.

Abstract: A circuit includes a core having a memory array. The memory array includes memory cells and bitlines, and is arranged in columns. The core includes a metallization layer having connections to the memory array, which is devoid of memory cells. Digit lines are connected to the bitlines of a column of the memory array. A write driver is connected to the digit lines. A write assist circuit is connected to the write driver. The write assist circuit maintains a voltage on the digit lines prior to write operations and provides a boost voltage to the digit lines during write operations. A wire bridge located in the metallization layer of the core connects the write assist circuit to the write driver.

Abstract: A circuit includes a core having a memory array. The memory array includes memory cells and bitlines, and is arranged in columns. The core includes a metallization layer having connections to the memory array, which is devoid of memory cells. Digit lines are connected to the bitlines of a column of the memory array. A write driver is connected to the digit lines. A write assist circuit is connected to the write driver. The write assist circuit maintains a voltage on the digit lines prior to write operations and provides a boost voltage to the digit lines during write operations. A wire bridge located in the metallization layer of the core connects the write assist circuit to the write driver.

Abstract: A circuit includes a core having a memory array. The memory array includes memory cells and bitlines, and is arranged in columns. The core includes a metallization layer having connections to the memory array, which is devoid of memory cells. Digit lines are connected to the bitlines of a column of the memory array. A write driver is connected to the digit lines. A write assist circuit is connected to the write driver. The write assist circuit maintains a voltage on the digit lines prior to write operations and provides a boost voltage to the digit lines during write operations. A wire bridge located in the metallization layer of the core connects the write assist circuit to the write driver.

Abstract: A circuit includes a core having a memory array. The memory array includes memory cells and bitlines, and is arranged in columns. The core includes a metallization layer having connections to the memory array, which is devoid of memory cells. Digit lines are connected to the bitlines of a column of the memory array. A write driver is connected to the digit lines. A write assist circuit is connected to the write driver. The write assist circuit maintains a voltage on the digit lines prior to write operations and provides a boost voltage to the digit lines during write operations. A wire bridge located in the metallization layer of the core connects the write assist circuit to the write driver.

Abstract: A method for detecting and mitigating excessive clutch disc wear for a manual transmission includes determining if a clutch pedal position is depressed greater than or equal to a first predetermined pedal position threshold and if the vehicle speed is less than or equal to a predetermined vehicle speed threshold. The method further includes determining if the clutch pedal position is depressed greater than or equal to a second predetermined pedal position threshold when the clutch pedal position is depressed less than the first predetermined pedal position threshold. The method still further includes calculating a clutch disc heat flux value and a clutch disc surface temperature. The method further includes displaying an alert/warning and a remedial action message to a vehicle operator when the clutch disc surface temperature is greater than or equal to a predetermined surface temperature threshold.

Abstract: A method for detecting and mitigating excessive clutch disc wear for a manual transmission includes determining if a clutch pedal position is depressed greater than or equal to a first predetermined pedal position threshold and if the vehicle speed is less than or equal to a predetermined vehicle speed threshold. The method further includes determining if the clutch pedal position is depressed greater than or equal to a second predetermined pedal position threshold when the clutch pedal position is depressed less than the first predetermined pedal position threshold. The method still further includes calculating a clutch disc heat flux value and a clutch disc surface temperature. The method further includes displaying an alert/warning and a remedial action message to a vehicle operator when the clutch disc surface temperature is greater than or equal to a predetermined surface temperature threshold.

Abstract: Memory cells with read assist schemes and methods of use are provided. The memory includes a plurality of rows and columns, each of which include a memory cell having a pull-down device. The memory further includes at least one boost circuit connected to each of the memory cells and which provides a negative boost signal to the pull-down devices during read access.

Abstract: A system, a storage device storing at least one program, and a computer-implemented method for tracking resource consumption by an invitee across multiple computational resources are described herein. For example, a first aggregated nodal log maintained by a first computational resource may be accessed. The first aggregated nodal log characterizes consumption from the first computational resource by the invitee. A second aggregated nodal log maintained by a second computational resource is also accessed. The second aggregated nodal log characterizes consumption from the second computational resource by the invitee. The resource consumption of resources within the cloud system by the invitee is then determined. The determination may be based on combining the first usage data of the first invitee usage record with the second usage data of the second invitee usage record. A corrective action within the cloud system is then performed based on the resource consumption.

Abstract: A method for allocating a resource to a requesting execution entity may include deriving at least one independently accessible resource head from the global resource, assigning the at least one resource head to the execution entity, and allocating resources from the assigned resource head to the execution entity.