Patents by Inventor Biswanath Panda

Biswanath Panda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11734541
    Abstract: The present disclosure relates to the field of security systems and discloses a tamper detection device. The device (100) comprises at least one transducer (106,110), a power supply unit (114), a logical gate (112), a processing unit (104), and, a tamper tag 102). The transducer (106,110) generates a trigger signal upon detection of a tamper event. The logical gate (112) is operable in an open state or a closed state. The processing unit (104) generates a tamper detection signal for changing the state of the logical gate (112) upon receiving the trigger signal or upon detecting loss of power supply from the power supply unit (114). The change in state of logical gate (112) causes a tamper flag value stored in the tamper tag (102) to change, thereby indicating a tampered status to a reader scanning the tamper tag (102). The device (100) detects a tamper event even if the device (100) is not damaged/broken during tampering.
    Type: Grant
    Filed: January 25, 2021
    Date of Patent: August 22, 2023
    Assignees: SEPIO PRODUCTS PRIVATE LIMITED, INDIAN INSTITUTE OF TECHNOLOGY, KANPUR
    Inventors: Murad Nathani, Darshan Dhruman Gandhi, Paul Abner Noronha, Dattaprasad Narayan Kamat, Sabine Juliane Tripathi, Yashowanta Narayan Mohapatra, Biswanath Panda, Akhil Kumar Singh Rathore
  • Publication number: 20230060950
    Abstract: The present disclosure relates to the field of security systems and discloses a tamper detection device. The device (100) comprises at least one transducer (106,110), a power supply unit (114), a logical gate (112), a processing unit (104), and, a tamper tag 102). The transducer (106,110) generates a trigger signal upon detection of a tamper event. The logical gate (112) is operable in an open state or a closed state. The processing unit (104) generates a tamper detection signal for changing the state of the logical gate (112) upon receiving the trigger signal or upon detecting loss of power supply from the power supply unit (114). The change in state of logical gate (112) causes a tamper flag value stored in the tamper tag (102) to change, thereby indicating a tampered status to a reader scanning the tamper tag (102). The device (100) detects a tamper event even if the device (100) is not damaged/broken during tampering.
    Type: Application
    Filed: January 25, 2021
    Publication date: March 2, 2023
    Inventors: Murad Nathani, Darshan Dhruman Gandhi, Paul Abner Noronha, Dattaprasad Narayan Kamat, Sabine Juliane Tripathi, Yashowanta Narayan Mohapatra, Biswanath Panda, Akhil Kumar Singh Rathore