Patents by Inventor Bjørnar Hernes

Bjørnar Hernes has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11750177
    Abstract: A clock delay circuit is configured to generate a delayed clock signal based on an input clock signal, the delayed clock signal delayed by a delay time (TDEL). The circuit includes a current mirror configured to generate starved currents based on the reference current, a plurality of inverters, and a Schmitt trigger configured to generate an output signal in response to the input clock signal, wherein the Schmitt trigger output signal increases from a low signal to a high signal over a period (TCHARGE) correlated with TDEL. Some inverters and the Schmitt trigger are configured to be current starved when the input clock signal is high and are configured to be shorted to ground and the reference current when the input clock signal is low. TDEL is based on TCHARGE and TCHARGE is based on C, NTOP, VST,High, and a supply voltage.
    Type: Grant
    Filed: January 6, 2017
    Date of Patent: September 5, 2023
    Inventor: Bjørnar Hernes
  • Patent number: 11692853
    Abstract: A source follower for a capacitive sensor device having a sense node and a shield node is provided. The source follower may include a transistor, and a switch array selectively coupling the transistor between the sense node and the shield node. The switch array may be configured to substantially disable current to the transistor during a first mode of operation, precharge the transistor during a second mode of operation, and enable the transistor to copy a sense node voltage to a shield node voltage during a third mode of operation.
    Type: Grant
    Filed: January 6, 2017
    Date of Patent: July 4, 2023
    Inventors: Bjørnar Hernes, Pål Øyvind Reichelt
  • Patent number: 10578461
    Abstract: A capacitive sensor device is provided. The capacitive sensor device may include a clock module configured to generate a clock signal, a sensor module configured to generate a reference signal and a sense signal, and sample a difference between the reference signal and the sense signal according to the clock signal, and a current supply module configured to selectively generate a bias current according to the clock signal, and charge each of the clock module and the sensor module based on the bias current and according to the clock signal.
    Type: Grant
    Filed: January 6, 2017
    Date of Patent: March 3, 2020
    Assignee: Disuptive Technologies Research AS
    Inventor: Bjørnar Hernes
  • Patent number: 10153752
    Abstract: A relaxation oscillator circuit includes a current mirror configured to receive the input current from the and generate a plurality of starved currents, a Schmitt trigger configured to be current starved by a first starved current of the plurality of starved currents and a plurality of inverters configured to receive a Schmitt trigger output signal and generate an output clock signal, the inverters including a plurality of current starved inverters that are current starved by a second starved current of the plurality of starved currents, the plurality of current starved inverters receiving the Schmitt trigger output signal and generating a first inverter output signal, upon which an output clock signal is based. The relaxation includes a capacitor configured to charge or discharge in response to the output clock signal and a switching module configured to provide current from the current source based on the output clock signal.
    Type: Grant
    Filed: January 6, 2017
    Date of Patent: December 11, 2018
    Assignee: DISRUPTIVE TECHNOLOGIES RESEARCH AS
    Inventor: Bjørnar Hernes
  • Publication number: 20170191854
    Abstract: A source follower for a capacitive sensor device having a sense node and a shield node is provided. The source follower may include a transistor, and a switch array selectively coupling the transistor between the sense node and the shield node. The switch array may be configured to substantially disable current to the transistor during a first mode of operation, precharge the transistor during a second mode of operation, and enable the transistor to copy a sense node voltage to a shield node voltage during a third mode of operation.
    Type: Application
    Filed: January 6, 2017
    Publication date: July 6, 2017
    Applicant: Disruptive Technologies Research AS
    Inventors: Bjørnar Hernes, Pål Øyvind Reichelt
  • Publication number: 20170191853
    Abstract: A capacitive sensor device is provided. The capacitive sensor device may include a clock module configured to generate a clock signal, a sensor module configured to generate a reference signal and a sense signal, and sample a difference between the reference signal and the sense signal according to the clock signal, and a current supply module configured to selectively generate a bias current according to the clock signal, and charge each of the clock module and the sensor module based on the bias current and according to the clock signal.
    Type: Application
    Filed: January 6, 2017
    Publication date: July 6, 2017
    Applicant: Disruptive Technologies Research AS
    Inventor: Bjørnar Hernes
  • Publication number: 20170194950
    Abstract: A clock delay circuit is configured to generate a delayed clock signal based on an input clock signal, the delayed clock signal delayed by a delay time (TDEL). The circuit includes a current mirror configured to generate starved currents based on the reference current, a plurality of inverters, and a Schmitt trigger configured to generate an output signal in response to the input clock signal, wherein the Schmitt trigger output signal increases from a low signal to a high signal over a period (TCHARGE) correlated with TDEL. Some inverters and the Schmitt trigger are configured to be current starved when the input clock signal is high and are configured to be shorted to ground and the reference current when the input clock signal is low. TDEL is based on TCHARGE and TCHARGE is based on C, NTOP, VST,High, and a supply voltage.
    Type: Application
    Filed: January 6, 2017
    Publication date: July 6, 2017
    Applicant: Disruptive Technologies Research AS
    Inventor: Bjørnar Hernes
  • Publication number: 20170194944
    Abstract: A relaxation oscillator circuit includes a current mirror configured to receive the input current from the and generate a plurality of starved currents, a Schmitt trigger configured to be current starved by a first starved current of the plurality of starved currents and a plurality of inverters configured to receive a Schmitt trigger output signal and generate an output clock signal, the inverters including a plurality of current starved inverters that are current starved by a second starved current of the plurality of starved currents, the plurality of current starved inverters receiving the Schmitt trigger output signal and generating a first inverter output signal, upon which an output clock signal is based. The relaxation includes a capacitor configured to charge or discharge in response to the output clock signal and a switching module configured to provide current from the current source based on the output clock signal.
    Type: Application
    Filed: January 6, 2017
    Publication date: July 6, 2017
    Applicant: Disruptive Technologies Research AS
    Inventor: Bjørnar Hernes