Abstract: A memory interface chip with rapid search capability incorporates multiple registers to latch data from a memory under control of a microprocessor and to permit comparison of search strings and masking or special comparison characters provided by a processor with data from the memory. The memory interface chip includes a first register having a first plurality of storage locations for storing a target search string, and a second register having a second plurality of storage locations for receiving data in parallel from the memory. A plurality of comparators connected to the registers compares the search target string to data from the memory. Each column of comparators feeds forward a positive compare result from any comparator in the column to an AND gate receiving the output of the next sequential comparator in the next column of comparators, thereby allowing confirmation of the positive comparisons of the target string by the comparator columns.

Abstract: An improved design verification system for testing VLSI chips including an outer chassis with access hatches for servicing, removing and installing test circuitry. The chassis additionally incorporates an optics aperture and a manipulator interface which are used in conjunction with other test equipment such as wafer probers. A device-under-test (DUT) board for electromechanically positioning an integrated circuit device is electrically connected directly to a plurality of pin electronics (PE) boards through extended DUT board edge connectors. In addition to the direct DUT/PE boards connection, the PE boards are also directly connected to the backplane assembly through data edge connectors and power edge connectors.