Patents by Inventor Bo Hua
Bo Hua has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11983680Abstract: An intelligent monitoring system for waste disposal and the method thereof are provided, which include a plurality of operational devices and stages. First, a transportation stage is performed to loading a transport vehicle with a waste so as to transport the waste to a disposal station for further treatment. A camera and a sensor for detecting abnormal conditions are installed any one of the operational devices or installed in the operational path of any one of the operational devices. The camera records the videos of the operational stages, captures the images from the videos and recognizes the images in order to determine whether the abnormal conditions occur in any one of the operational stages. Alternatively, the camera is triggered to capture the images and recognize the images after the abnormal conditions are detected by the sensor in order to determine whether the abnormal conditions actually occur.Type: GrantFiled: June 12, 2021Date of Patent: May 14, 2024Assignee: CHASE SUSTAINABILITY TECHNOLOGY CO., LTD.Inventors: Yung-Fa Yang, Tsung-Tien Chen, Shao-Hsin Hsu, Bo-Wei Chen, Chia-Ching Chen, Ming-Hua Tang
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Publication number: 20240111473Abstract: A distributed display method provides different parts of an application interface that are collaboratively displayed on a plurality of terminals, so that manners for collaborative display between the plurality of terminals are more flexible and richer. A first terminal displays a first interface including a first part and a second part. When the first terminal detects that a preset condition is met, the first terminal displays a second interface, where the second interface includes the first part and does not include the second part; and the first terminal notifies a second terminal to display a third interface, where the third interface includes the second part and does not include the first part.Type: ApplicationFiled: December 6, 2023Publication date: April 4, 2024Inventors: Zhen Wang, Bo Qiang, Bingxin Sun, Yanan Zhang, Hongjun Wang, Junjie Si, Mengzheng Hua, Gang Li, Cheng Luo, Xiaoxiao Duan, Wei Li, Chao Xu
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Publication number: 20240100849Abstract: A fluid-ejection die cartridge includes a cartridge body. The fluid-ejection die cartridge includes a fluid-ejection die fluidically attached to the cartridge body. The fluid-ejection die is to eject fluid. The fluid-ejection die cartridge includes a stamped nanoceramic layer on an exposed fluid-ejection nozzle plate of the fluid-ejection die attached to the cartridge body.Type: ApplicationFiled: April 14, 2020Publication date: March 28, 2024Applicant: Hewlett-Packard Development Company, L.P.Inventors: Chien-Hua Chen, Michael G Groh, Bo Song
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Publication number: 20240107731Abstract: The present disclosure provides a matte-type electromagnetic interference shielding film including bio-based components, which includes a bio-based insulating layer, a bio-based adhesive layer, a metal layer, and a bio-based electrically conductive adhesive layer. The matte-type electromagnetic interference shielding film including the bio-based component of the present disclosure has a matte appearance and high bio-based content and has the advantages of good surface insulation, high surface hardness, good chemical resistance, high shielding performance, good adhesion strength, low transmission loss, high transmission quality, good operability, high heat resistance, and the inner electrically conductive adhesive layer with long shelf life and storage life. The present disclosure further provides a preparation method thereof.Type: ApplicationFiled: July 14, 2023Publication date: March 28, 2024Inventors: Bo-Sian DU, Wei-Chih LEE, Chia-Hua HO, Chih-Ming LIN, Chien-Hui LEE
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Patent number: 11923337Abstract: A method of manufacturing a carrying substrate is provided. At least one circuit component is disposed on a first circuit structure. An encapsulation layer is formed on the first circuit structure and encapsulates the circuit component. A second circuit structure is formed on the encapsulation layer and electrically connected to the circuit component. The circuit component is embedded in the encapsulation layer via an existing packaging process. Therefore, the routing area is increased, and a package substrate requiring a large size has a high yield and low manufacturing cost.Type: GrantFiled: August 29, 2019Date of Patent: March 5, 2024Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Chi-Ching Ho, Bo-Hao Ma, Yu-Ting Xue, Ching-Hung Tseng, Guan-Hua Lu, Hong-Da Chang
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Publication number: 20230197487Abstract: A wafer supporting mechanism and a method for wafer dicing are provided. The wafer supporting mechanism includes a base portion and a support portion. The base portion includes a first gas channel and a first outlet connected to the first gas channel. The support portion is connected to the base portion and including a second gas channel connected to the first gas channel. An accommodation space is defined by the base portion and the support portion.Type: ApplicationFiled: February 21, 2023Publication date: June 22, 2023Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Bo Hua CHEN, Yan Ting SHEN, Fu Tang CHU, Wen-Pin HUANG
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Publication number: 20230054304Abstract: Disclosed are a compound having a neuroprotective effect, a preparation method therefor and a use thereof. Specifically, the compound has the structure shown by formula I, the definition of each group and substituent being as described in the description. Further disclosed are a preparation method for the compound and a use thereof for neuroprotection.Type: ApplicationFiled: December 10, 2020Publication date: February 23, 2023Inventors: Bo LIANG, Huanming CHEN, Gang LIU, Zhijun ZHANG, Tian XIA, Bo HUA, Qiu JIN
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Patent number: 11587809Abstract: A wafer supporting mechanism and a method for wafer dicing are provided. The wafer supporting mechanism includes a base portion and a support portion. The base portion includes a first gas channel and a first outlet connected to the first gas channel. The support portion is connected to the base portion and including a second gas channel connected to the first gas channel. An accommodation space is defined by the base portion and the support portion.Type: GrantFiled: September 30, 2020Date of Patent: February 21, 2023Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Bo Hua Chen, Yan Ting Shen, Fu Tang Chu, Wen-Pin Huang
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Publication number: 20230037117Abstract: A method of manufacturing a semiconductor structure is provided. The method includes the following operations: providing a semiconductor substrate; performing a first cutting operation along a first set of cutting lines of the semiconductor substrate; and performing a second cutting operation along a second set of cutting lines of the semiconductor substrate later than performing the first cutting operation, wherein the second set of cutting lines are arranged interlacedly with the first set of cutting lines along a first direction.Type: ApplicationFiled: July 30, 2021Publication date: February 2, 2023Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Bo Hua CHEN, Yan Ting SHEN, Tsung Chi WU, Tai-Hung KUO
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Publication number: 20220340563Abstract: 2-aminopyrimidine compounds and pharmaceutical compositions and uses thereof are provided. Specifically, the 2-aminopyrimidine compounds have a structure as shown in formula I. The compounds are suitable for use in the fields of anti-virus and anti-infection, as well as treatment of diseases such as autoimmune diseases and tumors.Type: ApplicationFiled: August 12, 2020Publication date: October 27, 2022Inventors: Bo LIANG, Qiu JIN, Huanming CHEN, Zhijun ZHANG, Tian XIA, Bo HUA, Gang LIU
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Patent number: 11471457Abstract: The present invention relates to a combination of anti-human VEGFR-2 antibodies and human EGFR tyrosine kinase inhibitors for the treatment of T790M-positive EGFR-mutant non-small cell lung cancer.Type: GrantFiled: August 20, 2018Date of Patent: October 18, 2022Assignees: Eli Lilly and Company, Medimmune LimitedInventors: Bo Hua Chao, Sang Min Lee
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Publication number: 20220227713Abstract: A tetrahydro-1H-benzazepine compound as a potassium channel modulator, a preparation method, and a medicament containing the compound are provided. Specifically, the compound has the structure shown by formula A, in which the definitions of each group and substituent are described in the description. A preparation method for the compound and its use as potassium channel modulator are also described.Type: ApplicationFiled: May 26, 2020Publication date: July 21, 2022Inventors: Bo LIANG, Qiu JIN, Huanming CHEN, Zhijun ZHANG, Bo HUA
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Publication number: 20220222383Abstract: An encrypted hard disk device is provided, including a near-field communication (NFC) sensing module, a processor, a storage unit, and a power switch. The NFC sensing module is configured to read a user identification (UID) of at least one sensor element. The processor is electrically connected to the NFC sensing module and the storage unit. The processor receives the UID and generates a control signal when the UID is approved. The power switch is electrically connected to the processor and the storage unit and maintains a conducting state according to the control signal and supplies power to the storage unit for accessing the storage unit.Type: ApplicationFiled: January 3, 2022Publication date: July 14, 2022Inventors: Cheng-Yu Wang, Shao-Kai Liu, Yu-Hsiang Huang, Bo-Hua Yang
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Publication number: 20220102176Abstract: A wafer supporting mechanism and a method for wafer dicing are provided. The wafer supporting mechanism includes a base portion and a support portion. The base portion includes a first gas channel and a first outlet connected to the first gas channel. The support portion is connected to the base portion and including a second gas channel connected to the first gas channel. An accommodation space is defined by the base portion and the support portion.Type: ApplicationFiled: September 30, 2020Publication date: March 31, 2022Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Bo Hua CHEN, Yan Ting SHEN, Fu Tang CHU, Wen-Pin HUANG
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Patent number: 11189518Abstract: A method of processing a semiconductor wafer is provided. The method includes providing a semiconductor wafer having a front side and a back side, the semiconductor wafer provided with a circuit layer at the front side and a patterned surface at the back side, forming a sacrificial layer on the back side, mounting a tape on the sacrificial layer, the sacrificial layer isolating the patterned surface from the tape, wherein adhesion strength between the sacrificial layer and the patterned surface is larger than that between the sacrificial layer and the tape, dicing the semiconductor wafer at the back side through the tape, defining individual chips on the semiconductor wafer, and expanding the tape to separate the chips from each other.Type: GrantFiled: November 15, 2019Date of Patent: November 30, 2021Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Yan Ting Shen, Bo Hua Chen, Fu Tang Chu, Wen Han Yang
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Patent number: 11177562Abstract: An electronic device is provided. The electronic device includes a metal housing, an insulation element, and an antenna unit. The insulation element is disposed on the metal housing and includes a first heat dissipation hole. The antenna unit is disposed on the insulation element and includes a radiation portion and a feeding portion. The radiation portion is composed of a conductor. The feeding portion is electrically connected to the radiation portion and a grounding plane. In this way, according to the electronic device, space configuration inside the electronic device is saved and a shielding effect of the metal housing is prevented from affecting stability of sending and receiving a signal.Type: GrantFiled: January 8, 2020Date of Patent: November 16, 2021Assignee: ASUSTEK COMPUTER INC.Inventors: Bo-Hua Yang, Yu-Hsiang Huang, Shao-Kai Liu, Zhi-Hua Feng
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Patent number: 11047806Abstract: Methods and systems for discovery of defects of interest (DOI) buried within three dimensional semiconductor structures and recipe optimization are described herein. The volume of a semiconductor wafer subject to defect discovery and verification is reduced by storing images associated with a subset of the total depth of the semiconductor structures under measurement. Image patches associated with defect locations at one or more focus planes or focus ranges are recorded. The number of optical modes under consideration is reduced based on any of a comparison of one or more measured wafer level defect signatures and one or more expected wafer level defect signatures, measured defect signal to noise ratio, and defects verified without de-processing. Furthermore, verified defects and recorded images are employed to train a nuisance filter and optimize the measurement recipe. The trained nuisance filter is applied to defect images to select the optimal optical mode for production.Type: GrantFiled: November 29, 2017Date of Patent: June 29, 2021Assignee: KLA-Tencor CorporationInventors: Santosh Bhattacharyya, Devashish Sharma, Christopher Maher, Bo Hua, Philip Measor, Robert M. Danen
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Publication number: 20210151342Abstract: A method of processing a semiconductor wafer is provided. The method includes providing a semiconductor wafer having a front side and a back side, the semiconductor wafer provided with a circuit layer at the front side and a patterned surface at the back side, forming a sacrificial layer on the back side, mounting a tape on the sacrificial layer, the sacrificial layer isolating the patterned surface from the tape, wherein adhesion strength between the sacrificial layer and the patterned surface is larger than that between the sacrificial layer and the tape, dicing the semiconductor wafer at the back side through the tape, defining individual chips on the semiconductor wafer, and expanding the tape to separate the chips from each other.Type: ApplicationFiled: November 15, 2019Publication date: May 20, 2021Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Yan Ting SHEN, Bo Hua CHEN, Fu Tang CHU, Wen Han YANG
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Publication number: 20200235465Abstract: An electronic device is provided. The electronic device includes a metal housing, an insulation element, and an antenna unit. The insulation element is disposed on the metal housing and includes a first heat dissipation hole. The antenna unit is disposed on the insulation element and includes a radiation portion and a feeding portion. The radiation portion is composed of a conductor. The feeding portion is electrically connected to the radiation portion and a grounding plane. In this way, according to the electronic device, space configuration inside the electronic device is saved and a shielding effect of the metal housing is prevented from affecting stability of sending and receiving a signal.Type: ApplicationFiled: January 8, 2020Publication date: July 23, 2020Inventors: Bo-Hua YANG, Yu-Hsiang HUANG, Shao-Kai LIU, Zhi-Hua FENG
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Publication number: 20200155551Abstract: The present invention relates to a combination of anti-human VEGFR-2 antibodies and human EGFR tyrosine kinase inhibitors for the treatment of T790M-positive EGFR-mutant non-small cell lung cancer.Type: ApplicationFiled: August 20, 2018Publication date: May 21, 2020Inventors: Bo Hua CHAO, Sang Min LEE