Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 16200 and a code rate of 2/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 256-symbol mapping.

Abstract: There are provided a battery management apparatus, a battery management method and a battery pack. The battery management apparatus generates a first data set including a first current value, a first voltage value and a first temperature value indicating a current, a voltage and a temperature of a battery. The battery management apparatus generates a second data set from the first data set using an error generator. The battery management apparatus determines a first candidate value, a second candidate value and a third candidate value for a state of charge (SOC) from the first current value, the first data set and the second data set, respectively. The control unit determines the first candidate value or the second candidate value as the SOC based on a first difference value between the first candidate value and the second candidate value.

Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 16200 and a code rate of 3/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 256-symbol mapping.

Abstract: Provided is a method of calculating a resistance and a capacitance of an energy storage system, including a current application step of applying a predetermined current having a constant value to the energy storage system; a first voltage measurement step of measuring a voltage of the energy storage system while the predetermined current is applied to the energy storage system; a second voltage measurement step of measuring a voltage of the energy storage system after breaking the predetermined current applied to the energy storage system; and a step of calculating a resistance (R) and a capacitance (C) of the energy storage system based on the voltage of the energy storage system measured in the first voltage measurement step, the voltage of the energy storage system measured in the second voltage measurement step, and the predetermined current having the constant value.

Abstract: An ESS capable of detecting a defective battery cell, the ESS in accordance with an exemplary embodiment, may include a plurality of battery cells, and a control unit for controlling the charge/discharge of the ESS, wherein the control unit includes an SOC calculation unit for calculating the SOC of the ESS, a voltage measurement unit for measuring the voltage of each of the plurality of battery cells, and a poor battery cell detection unit for detecting a defective battery cell from the voltages measured in the voltage measurement unit.

Abstract: There are provided a battery management apparatus, a battery management method and a battery pack. The battery management apparatus includes a sensing unit configured to detect a current, a voltage and a temperature of a battery, and a control unit. The control unit determines a first candidate value for a state of charge (SOC) of the battery using ampere counting. The control unit determines a Kalman gain and a second candidate value for the SOC using an extended Kalman filter. The control unit determines the first candidate value as the SOC when a difference value between the first candidate value and the second candidate value is larger than a threshold value. The control unit adjusts a ratio of second process noise to first process noise in the extended Kalman filter based on a first component and a second component of the Kalman gain.

Abstract: Disclosed herein are a method for channel decoding using noise level correction in a high-speed mobile reception environment and an apparatus for the same. The method includes estimating, by a signal receiver that is based on OFDM and is moving at high speed, Inter-Carrier Interference (ICI) power for received signal power based on the movement speed of the signal receiver; calculating, by the signal receiver, a Signal-to-Noise Ratio (SNR) for a received signal using an estimate of the ICI power; and decoding, by the signal receiver, a channel code based on a Log Likelihood Ratio (LLR) per bit, calculated based on the SNR, and the received signal.

Abstract: An apparatus and method for broadcast signal frame using layered division multiplexing are disclosed. An apparatus for generating broadcast signal frame according to an embodiment of the present invention includes a combiner configured to generate a multiplexed signal by combining a core layer signal and an enhanced layer signal at different power levels; a power normalizer configured to reduce the power of the multiplexed signal to a power level corresponding to the core layer signal; a time interleaver configured to generate a time-interleaved signal by performing interleaving that is applied to both the core layer signal and the enhanced layer signal; and a frame builder configured to generate a broadcast signal frame including a preamble for signaling, start position information of Physical Layer Pipes (PLPs) and time interleaver information shared by the core layer signal and the enhanced layer signal.

Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 16200 and a code rate of 4/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 16-symbol mapping.

Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 16200 and a code rate of 2/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 256-symbol mapping.

Abstract: An apparatus and method for generating a broadcast signal frame for signaling a time interleaving mode are disclosed. An apparatus for generating broadcast signal frame according to an embodiment of the present invention includes a time interleaver configured to generate a time-interleaved signal by performing time interleaving on a BICM output signal; and a frame builder configured to generate a broadcast signal frame including a preamble for signaling a time interleaving mode corresponding to the time interleaver for each of physical layer pipes (PLPs).

Abstract: An apparatus and method for generating a broadcast signal frame corresponding to a time interleaver supporting a plurality of operation modes are disclosed.

Abstract: Disclosed herein are an apparatus for analyzing a transmitter identification (TxID) signal and a method using the apparatus. The apparatus for analyzing the TxID signal includes a demodulator for decoding the bootstrap of a received signal; a cancellation unit for performing a host signal cancellation process for the received signal, thereby generating a host-signal-cancelled received signal; a correlator for calculating a correlation value between a signal corresponding to the host-signal-cancelled received signal and a signal corresponding to a TxID sequence; and a TxID profile analyzer for generating information about a channel between a transmitter corresponding to the TxID signal and a receiver using the correlation value.

Abstract: An apparatus and method for generating a broadcast signal frame corresponding to a time interleaver supporting a plurality of operation modes are disclosed. An apparatus for generating broadcast signal frame according to an embodiment of the present invention includes a combiner configured to generate a multiplexed signal by combining a core layer signal and an enhanced layer signal; a power normalizer configured to reduce the power of the multiplexed signal to a power level corresponding to the core layer signal; a time interleaver configured to generate a time-interleaved signal by performing interleaving that is applied to both the core layer signal and the enhanced layer signal; and a frame builder configured to generate a broadcast signal frame including a preamble for signaling time interleaver information corresponding to the time interleaver, the preamble includes a field indicating a start position of a first complete FEC block corresponding to each of physical layer pipes.

Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 16200 and a code rate of 4/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 16-symbol mapping.

Abstract: An apparatus and method for generating a broadcast signal frame corresponding to a time interleaver supporting a plurality of operation modes are disclosed.

Abstract: An apparatus and method for generating a broadcast signal frame for signaling a time interleaving mode are disclosed. An apparatus for generating broadcast signal frame according to an embodiment of the present invention includes a time interleaver configured to generate a time-interleaved signal by performing time interleaving on a BICM output signal; and a frame builder configured to generate a broadcast signal frame including a preamble for signaling a time interleaving mode corresponding to the time interleaver for each of physical layer pipes (PLPs).

Abstract: An apparatus and method for generating a broadcast signal frame corresponding to a time interleaver supporting a plurality of operation modes are disclosed. An apparatus for generating broadcast signal frame according to an embodiment of the present invention includes a combiner configured to generate a multiplexed signal by combining a core layer signal and an enhanced layer signal; a power normalizer configured to reduce the power of the multiplexed signal to a power level corresponding to the core layer signal; a time interleaver configured to generate a time-interleaved signal by performing interleaving that is applied to both the core layer signal and the enhanced layer signal; and a frame builder configured to generate a broadcast signal frame including a preamble for signaling time interleaver information corresponding to the time interleaver, the preamble includes a field indicating a start position of a first complete FEC block corresponding to each of physical layer pipes.

Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 16200 and a code rate of 3/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 64-symbol mapping.

Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 16200 and a code rate of 10/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 256-symbol mapping.