Patents by Inventor Bo Xia

Bo Xia has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200165661
    Abstract: Disclosed are a method for marking 5-formyl cytosine and the use thereof in single base resolution sequencing. The method for marking the 5-formyl cytosine comprises the following steps of: (1) preparing a DNA or RNA sample; and (2) mixing the DNA or RNA sample with a buffer solution and a compound R1—CH2—CN to obtain a marking reaction system; and reacting the compound R1—CH2—CN therein with the 5-formyl cytosine in DNA and RNA molecules, and thereby achieving the marking of the 5-formyl cytosine; the reaction process is as in (I) below: wherein, R1 is an electron withdrawing group next to the CH2 group, preferably —CN, (II) or (III), and more preferably —CN; R is a DNA or RNA molecule connected to the 5-formyl cytosine; and the pH value of the marking reaction system is 7.5-9. On this basis, also provided in the present invention is a sequencing analysis method for the 5-formyl cytosine.
    Type: Application
    Filed: February 26, 2018
    Publication date: May 28, 2020
    Inventors: Chengqi YI, Chenxu ZHU, Bo XIA
  • Patent number: 10519184
    Abstract: The present invention relates to a 5-formylcytosine specific chemical labeling method and related applications in aspects such as sequencing, detection, imaging, and diagnosis. In the method, a condensation reaction occurs between an active methylene group in an active methylene compound containing a side-chain reactive group and an aldehyde group in 5-formylcytosine or a 1-substituted derivative of 5-formylcytosine, and at the same time an intramolecular reaction occurs between the side-chain reactive group of the active methylene compound and a 4-amino group of cytosine to implement ring closing.
    Type: Grant
    Filed: September 26, 2014
    Date of Patent: December 31, 2019
    Assignee: PEKING UNIVERSITY
    Inventors: Chengqi Yi, Bo Xia, Ankun Zhou
  • Publication number: 20190222227
    Abstract: Processors are arranged in a pipeline structure to operate on multiple layers of data, each layer comprising multiple groups of data. An input to a memory is coupled to an output of the last processor in the pipeline, and the memory's output is coupled to an input of the first processor in the pipeline. Multiplexing and de-multiplexing operations are performed in the pipeline. For each group in each layer, a stored result read from the memory is applied to the first processor in the pipeline structure. A calculated result of the stored result is output at the last processor and stored in the memory. Once processing for the last group of data in a first layer is completed, the corresponding processor is configured to process data in a next layer before the pipeline finishes processing the first layer. The stored result obtained from the next layer comprises a calculated result produced from a layer previous to the first layer.
    Type: Application
    Filed: February 15, 2019
    Publication date: July 18, 2019
    Inventors: Bo Xia, Ricky Lap Kei Cheung, Bo Lu
  • Patent number: 10301496
    Abstract: Provided herein are conductive ink compositions having a good balance between adhesion to substrate, stability of submicron-sized particles, the ability to be sintered at relatively low temperatures, and good electrical conductivity. In one aspect, there are provided conductive networks prepared from compositions according to the present invention. In certain aspects, such conductive networks are suitable for use in touch panel displays. In certain aspects, the invention relates to methods for adhering submicron silver particles to a non-metallic substrate. In certain aspects, the invention relates to methods for improving the adhesion of a submicron silver-filled composition to a non-metallic substrate.
    Type: Grant
    Filed: February 16, 2016
    Date of Patent: May 28, 2019
    Assignees: HENKEL IP & HOLDING GMBH, HENKEL AG & CO. KGAA
    Inventors: Bo Xia, Rudolf W. Oldenzijl, Jianping Chen, Gunther Dreezen
  • Patent number: 10250280
    Abstract: Processors are arranged in a pipeline structure to operate on multiple layers of data, each layer comprising multiple groups of data. An input to a memory is coupled to an output of the last processor in the pipeline, and the memory's output is coupled to an input of the first processor in the pipeline. Multiplexing and de-multiplexing operations are performed in the pipeline. For each group in each layer, a stored result read from the memory is applied to the first processor in the pipeline structure. A calculated result of the stored result is output at the last processor and stored in the memory. Once processing for the last group of data in a first layer is completed, the corresponding processor is configured to process data in a next layer before the pipeline finishes processing the first layer. The stored result obtained from the next layer comprises a calculated result produced from a layer previous to the first layer.
    Type: Grant
    Filed: January 29, 2016
    Date of Patent: April 2, 2019
    Assignee: TensorCom, Inc.
    Inventors: Bo Xia, Ricky Lap Kei Cheung, Bo Lu
  • Publication number: 20180171168
    Abstract: Provided herein are ink compositions with improved conductivity. The improved conductivity is attributable to the addition of organohalogen compounds to the composition.
    Type: Application
    Filed: February 16, 2018
    Publication date: June 21, 2018
    Inventors: Hong Jiang, Himal Khatri, Bo Xia, Aziz Shaikh
  • Patent number: 9954560
    Abstract: Techniques pertaining to an adaptive/configurable IF wireless receiver are disclosed. Such an adaptive/configurable IF wireless receiver can be used in a Bluetooth device.
    Type: Grant
    Filed: October 21, 2014
    Date of Patent: April 24, 2018
    Assignee: Wuxi Vimicro Corporation
    Inventors: Bo Xia, Yue Wu, David Xiaodong Yang, Bin Xu, Li Kang
  • Patent number: 9556004
    Abstract: A handrail drive inverter for an escalator can include a memory configured to store instructions, a processor coupled to the memory, an input configured to receive a main speed control signal that corresponds to the speed of a main drive motor of the escalator, and an output configured to provide a handrail speed control signal for a handrail drive motor based on the instructions in the memory. The processor is configured to calculate a torque output of the handrail drive motor and determine the handrail speed control signal as a function of the torque output and a feedback of the handrail speed control signal constrained by at least one of an upper limit and a lower limit, the upper limit and the lower limit being determined from the main speed control signal.
    Type: Grant
    Filed: February 8, 2016
    Date of Patent: January 31, 2017
    Assignee: Kone Corporation
    Inventors: Bo Xia Xu, Tai Lai Zhou, Cai Xiao Liang
  • Publication number: 20160362438
    Abstract: The present invention relates to a 5-formylcytosine specific chemical labeling method and related applications in aspects such as sequencing, detection, imaging, and diagnosis. In the method, a condensation reaction occurs between an active methylene group in an active methylene compound containing a side-chain reactive group and an aldehyde group in 5-formylcytosine or a 1-substituted derivative of 5-formylcytosine, and at the same time an intramolecular reaction occurs between the side-chain reactive group of the active methylene compound and a 4-amino group of cytosine to implement ring closing.
    Type: Application
    Filed: September 26, 2014
    Publication date: December 15, 2016
    Inventors: Chengqi Yi, Bo XIA, Ankun ZHOU
  • Patent number: 9418047
    Abstract: A plurality of three bit units (called triplets) are permuted by a shuffler to shuffle the positions of the triplets into different patterns which are used to specific the read/write operation of a memory. For example, the least significant triplet in a conventional counter can be placed in the most significant position of a permuted three triplet pattern. The count of this permuted counter triplet generates addresses that jump 64 positions each clock cycle. These permutations can then be used to generate read and write control information to read from/write to memory banks conducive for efficient Radix-8 Butterfly operation. In addition, one or more triplets can also determine if a barrel shifter or right circular shift is required to shift data from one data lane to a second data lane. The triplets allow efficient FFT operation in a pipelined structure.
    Type: Grant
    Filed: February 27, 2014
    Date of Patent: August 16, 2016
    Assignee: Tensorcom, Inc.
    Inventors: Bo Lu, Ricky Lap Kei Cheung, Bo Xia
  • Publication number: 20160173131
    Abstract: Processors are arranged in a pipeline structure to operate on multiple layers of data, each layer comprising multiple groups of data. An input to a memory is coupled to an output of the last processor in the pipeline, and the memory's output is coupled to an input of the first processor in the pipeline. Multiplexing and de-multiplexing operations are performed in the pipeline. For each group in each layer, a stored result read from the memory is applied to the first processor in the pipeline structure. A calculated result of the stored result is output at the last processor and stored in the memory. Once processing for the last group of data in a first layer is completed, the corresponding processor is configured to process data in a next layer before the pipeline finishes processing the first layer. The stored result obtained from the next layer comprises a calculated result produced from a layer previous to the first layer.
    Type: Application
    Filed: January 29, 2016
    Publication date: June 16, 2016
    Applicant: Tensorcom, Inc.
    Inventors: Bo Xia, Ricky Lap Kei Cheung, Bo Lu
  • Publication number: 20160160067
    Abstract: Provided herein are conductive ink compositions having a good balance between adhesion to substrate, stability of submicron-sized particles, the ability to be sintered at relatively low temperatures, and good electrical conductivity. In one aspect, there are provided conductive networks prepared from compositions according to the present invention. In certain aspects, such conductive networks are suitable for use in touch panel displays. In certain aspects, the invention relates to methods for adhering submicron silver particles to a non-metallic substrate. In certain aspects, the invention relates to methods for improving the adhesion of a submicron silver-filled composition to a non-metallic substrate.
    Type: Application
    Filed: February 16, 2016
    Publication date: June 9, 2016
    Inventors: Bo Xia, Rudolf W. Oldenzijl, Jianping Chen, Gunther Dreezen
  • Publication number: 20160152447
    Abstract: A handrail drive inverter for an escalator can include a memory configured to store instructions, a processor coupled to the memory, an input configured to receive a main speed control signal that corresponds to the speed of a main drive motor of the escalator, and an output configured to provide a handrail speed control signal for a handrail drive motor based on the instructions in the memory. The processor is configured to calculate a torque output of the handrail drive motor and determine the handrail speed control signal as a function of the torque output and a feedback of the handrail speed control signal constrained by at least one of an upper limit and a lower limit, the upper limit and the lower limit being determined from the main speed control signal.
    Type: Application
    Filed: February 8, 2016
    Publication date: June 2, 2016
    Applicant: KONE CORPORATION
    Inventors: Bo Xia XU, Tai Lai ZHOU, Cai Xiao LIANG
  • Patent number: 9276610
    Abstract: The architecture is able to switch to Non-blocking check-node-update (CNU) scheduling architecture which has better performance than blocking CNU scheduling architecture. The architecture uses an Offset Min-Sum with Beta=1 with a clock domain operating at 440 MHz. The constraint macro-matrix is a spare matrix where each “1’ corresponds to a sub-array of a cyclically shifted identity matrix which is a shifted version of an identity matrix. Four core processors are used in the layered architecture where the constraint matrix uses a sub-array of 42 (check nodes)×42 (variable nodes) in the macro-array of 168×672 bits. Pipeline processing is used where the delay for each layer only requires 4 clock cycles.
    Type: Grant
    Filed: January 27, 2014
    Date of Patent: March 1, 2016
    Assignee: Tensorcom, Inc.
    Inventors: Bo Xia, Ricky Lap Kei Cheung, Bo Lu
  • Publication number: 20160013816
    Abstract: Techniques pertaining to an adaptive/configurable IF wireless receiver are disclosed. Such an adaptive/configurable IF wireless receiver can be used in a Bluetooth device.
    Type: Application
    Filed: October 21, 2014
    Publication date: January 14, 2016
    Inventors: Bo Xia, Yue Wu, David Xiaodong Yang, Bin Xu, Li Kang
  • Patent number: 9120647
    Abstract: An inverter for an escalator control device and an escalator control device are provided. The inverter includes: a control unit for receiving a detection signal from the passenger detector; a frequency inverting unit for inverting current frequency, input terminals of which are connected to the public electrical net, and which is connected with the output terminal of the control unit; a frequency inverting unit contactor, input terminals of which are connected to the frequency inverting unit, and output terminals of which are connected to a motor of the escalator; and a public electrical net contactor, input terminals of which are connected to a public electrical net, and output terminals of which are connected to the motor of the escalator.
    Type: Grant
    Filed: December 16, 2013
    Date of Patent: September 1, 2015
    Assignee: KONE CORPORATION
    Inventors: Cai Xiao Liang, Xu Bo Xia, Zhou Tai Lai
  • Publication number: 20150242365
    Abstract: A plurality of three bit units (called triplets) are permuted by a shuffler to shuffle the positions of the triplets into different patterns which are used to specific the read/write operation of a memory. For example, the least significant triplet in a conventional counter can be placed in the most significant position of a permuted three triplet pattern. The count of this permuted counter triplet generates addresses that jump 64 positions each clock cycle. These permutations can then be used to generate read and write control information to read from/write to memory banks conducive for efficient Radix-8 Butterfly operation. In addition, one or more triplets can also determine if a barrel shifter or right circular shift is required to shift data from one data lane to a second data lane. The triplets allow efficient FFT operation in a pipelined structure.
    Type: Application
    Filed: February 27, 2014
    Publication date: August 27, 2015
    Applicant: Tensoroom, Inc.
    Inventors: Bo Lu, Ricky Lap Kei Cheung, Bo Xia
  • Publication number: 20150214980
    Abstract: The architecture is able to switch to Non-blocking check-node-update (CNU) scheduling architecture which has better performance than blocking CNU scheduling architecture. The architecture uses an Offset Min-Sum with Beta=1 with a clock domain operating at 440 MHz. The constraint macro-matrix is a spare matrix where each “1’ corresponds to a sub-array of a cyclically shifted identity matrix which is a shifted version of an identity matrix. Four core processors are used in the layered architecture where the constraint matrix uses a sub-array of 42 (check nodes)×42 (variable nodes) in the macro-array of 168×672 bits. Pipeline processing is used where the delay for each layer only requires 4 clock cycles.
    Type: Application
    Filed: January 27, 2014
    Publication date: July 30, 2015
    Applicant: Tensorcom, Inc.
    Inventors: Bo Xia, Ricky Lap Kei Cheung, Bo Lu
  • Patent number: 8847184
    Abstract: An EMI shielding composite film for use in printed circuit boards has at least two layers, a top layer electrically conductive in all directions (isotropic), and a bottom layer electrically conductive only in the Z (thickness) direction (anisotropic) after thermo-compression. The bottom layer is in contact with the grounding pads of the circuitry of the electronic device to be shielded. The conductive top layer functions similarly to metallic boxes to prevent the electromagnetic radiation from both entering the boxes and escaping into the environment. The bottom layer interconnects the top conductive layer to the grounding pads on the PCB after thermo-compression so that electromagnetic waves collected by the top layer are directed and released to PCB grounding pads through the bottom layer.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: September 30, 2014
    Assignee: Henkel IP & Holding GmbH
    Inventors: Chih-Min Cheng, Bo Xia, George Thomas
  • Publication number: 20140166434
    Abstract: An inverter for an escalator control device and an escalator control device are provided. The inverter includes: a control unit for receiving a detection signal from the passenger detector; a frequency inverting unit for inverting current frequency, input terminals of which are connected to the public electrical net, and which is connected with the output terminal of the control unit; a frequency inverting unit contactor, input terminals of which are connected to the frequency inverting unit, and output terminals of which are connected to a motor of the escalator; and a public electrical net contactor, input terminals of which are connected to a public electrical net, and output terminals of which are connected to the motor of the escalator.
    Type: Application
    Filed: December 16, 2013
    Publication date: June 19, 2014
    Applicant: Kone Corporation
    Inventors: Cai Xiao LIANG, Xu Bo XIA, Zhou Tai LAI