Patents by Inventor Bodo Parady

Bodo Parady has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6408368
    Abstract: A software methodology to control replacement of one or more selected pages within a cache memory in a computer system. The operating system designates one or more pages containing critical data, text or other digital information as hot pages within a physical system memory in the computer system and prevents replacement during execution of various application programs of these hot pages when cached. The operating system inhibits allocation of the conflict pages that would map to cache locations occupied by a cached hot page, thereby preserving the hot page within the cache memory. The conflict pages are placed at the bottom of a free list created in the system memory by the operating system. The operating system scans the free list using a pointer while allocating free system memory space at run-time. The system memory pages are allocated from the free list until the pointer reaches a conflict page.
    Type: Grant
    Filed: June 15, 1999
    Date of Patent: June 18, 2002
    Assignee: Sun Microsystems, Inc.
    Inventor: Bodo Parady
  • Patent number: 6295600
    Abstract: A method and apparatus for switching between threads of a program in response to a long-latency event. In one embodiment, the long-latency events are load or store operations which trigger a thread switch if there is a miss in the level 2 cache. In addition to providing separate groups of registers for multiple threads, a group of program address registers pointing to different threads are provided. A switching mechanism switches between the program address registers in response to the long-latency events.
    Type: Grant
    Filed: June 28, 1999
    Date of Patent: September 25, 2001
    Assignee: Sun Microsystems, Inc.
    Inventor: Bodo Parady
  • Patent number: 5933627
    Abstract: A method and apparatus for switching between threads of a program in response to a long-latency event. In one embodiment, the long-latency events are load or store operations which trigger a thread switch if there is a miss in the level 2 cache. In addition to providing separate groups of registers for multiple threads, a group of program address registers pointing to different threads are provided. A switching mechanism switches between the program address registers in response to the long-latency events.
    Type: Grant
    Filed: July 1, 1996
    Date of Patent: August 3, 1999
    Assignee: Sun Microsystems
    Inventor: Bodo Parady