Abstract: The present disclosure presents a circuit, a method, and a system to drive a half-bridge switch using depletion (D) mode compound semiconductor (III-V) switching transistors for a DC-DC converter using at least one driver to drive the switches of the circuit. Also included is at least one charge pump electrically connected to a gate of the transistor, to maintain a voltage that holds the transistor in an off-state. The circuit includes AC coupling capacitors to level shift a voltage and realize fast transistor switching.

Abstract: The present disclosure presents a circuit, method, and system for dynamically determining optimal deadtime values in a DC-DC converter power stage while operating the circuit under controlled conditions during a test/trim routine. The determined optimal deadtime values are stored in non-volatile memory. The optimal deadtime values are used as fixed settings during normal PWM operation. On start-up, the optimal, fixed deadtime values are loaded into the deadtime circuits of the driver and used during normal PWM operation of the DC-DC converter power stage circuit.

Abstract: The present disclosure presents a circuit, a method, and a system to drive a half-bridge switch using depletion (D) mode compound semiconductor (III-V) switching transistors for a DC-DC converter using at least one driver to drive the switches of the circuit. Also included is at least one charge pump electrically connected to a gate of the transistor, to maintain a voltage that holds the transistor in an off-state. The circuit includes AC coupling capacitors to level shift a voltage and realize fast transistor switching.

Abstract: The present disclosure presents a circuit, a method, and a system to drive a half-bridge switch using depletion (D) mode compound semiconductor (III-V) switching transistors for a DC-DC converter using at least one driver to drive the switches of the circuit. Also included is at least one charge pump electrically connected to a gate of the transistor, to maintain a voltage that holds the transistor in an off-state. The circuit includes AC coupling capacitors to level shift a voltage and realize fast transistor switching.

Abstract: A method for soft-starting a voltage generator includes disabling an output driver; detecting the voltage on an output node; ramping a reference voltage at a controlled rate from a predetermined first level until the reference voltage reaches a second level that is a predetermined function of said output node voltage; enabling the output driver when the reference voltage reaches said second level; and then ramping the reference voltage and the output node voltage at a controlled rate to a boot voltage level. A soft-start circuit for an output voltage generator includes a comparator for causing a ramp generator to ramp the reference voltage and the voltage on the output node to a boot voltage level at a controlled rate once the comparator detects that the reference voltage is substantially equal to the voltage on the output node.

Abstract: A method for soft-starting a voltage generator includes disabling an output driver; detecting the voltage on an output node; ramping a reference voltage at a controlled rate from a predetermined first level until the reference voltage reaches a second level that is a predetermined function of said output node voltage; enabling the output driver when the reference voltage reaches said second level; and then ramping the reference voltage and the output node voltage at a controlled rate to a boot voltage level. A soft-start circuit for an output voltage generator includes a comparator for causing a ramp generator to ramp the reference voltage and the voltage on the output node to a boot voltage level at a controlled rate once the comparator detects that the reference voltage is substantially equal to the voltage on the output node.

Abstract: A control circuit for a variable phase voltage regulator comprises an error amplifier to generate a difference signal based on a difference between a reference voltage and a signal representative of a voltage at an output node of the variable phase voltage regulator. The control circuit also comprises a variable phase compensator to amplify the difference signal to produce a modified difference signal to compensate for effects of varying the number of active phases in the variable phase voltage regulator, wherein the amplification is proportional to a ratio of total number of phases in the variable phase voltage regulator to number of active phases in the variable phase voltage regulator.

Abstract: An improved organization for a MOSFET pair mounts first and second FET dies in an overlying or stacked relationship to reduce the surface area ‘footprint’ of the MOSFET pair. The source and drain of a high side FEThigh and a low side FETlow or the drains of the respective high side FEThigh and low side FETlow are bonded together, either directly or through an intermediate conductive ribbon or clip, to establish a common source/drain or drain/drain node that functions as the switch or phase node of the device. The stacked organization allows for lower-cost packaging that results in a significant reduction in the surface area footprint of the device and reduces parasitic impedance relative to the prior side-by-side organization and allows for improved heat sinking.

Abstract: A control circuit for a variable phase voltage regulator comprises an error amplifier to generate a difference signal based on a difference between a reference voltage and a signal representative of a voltage at an output node of the variable phase voltage regulator. The control circuit also comprises a variable phase compensator to amplify the difference signal to produce a modified difference signal to compensate for effects of varying the number of active phases in the variable phase voltage regulator, wherein the amplification is proportional to a ratio of total number of phases in the variable phase voltage regulator to number of active phases in the variable phase voltage regulator.

Abstract: An improved organization for a MOSFET pair mounts first and second FET dies in an overlying or stacked relationship to reduce the surface area ‘footprint’ of the MOSFET pair. The source and drain of a high side FEThigh and a low side FETlow or the drains of the respective high side FEThigh and low side FETlow are bonded together, either directly or through an intermediate conductive ribbon or clip, to establish a common source/drain or drain/drain node that functions as the switch or phase node of the device. The stacked organization allows for lower-cost packaging that results in a significant reduction in the surface area footprint of the device and reduces parasitic impedance relative to the prior side-by-side organization and allows for improved heat sinking.

Abstract: An IC incorporating a multiphase voltage converter with synchronized phase shift including a phase shift pin, a frequency select pin, a master clock pin, and a voltage regulator. The phase shift pin is coupled to a first voltage for a master mode or a first resistor for a slave mode. The frequency select pin is coupled to one of a second voltage and a second resistor. The master clock pin provides a master clock signal or receives an external clock signal. The IC provides the master clock signal at a frequency determined by the second resistor or otherwise at a default frequency. The voltage regulator operates in the slave mode at a phase shift relative to the external clock signal based on the first resistor and the second resistor or based on the first resistor and a default resistance if the second voltage is coupled.

Abstract: A power monitor circuit and method delays the start of a computer until multiple power lines are at a safe level of operation. The integrated circuit monitors only the voltage of a primary power supply output and eliminates the need for monitor circuits on each supply output. The power supply is made to exacting specifications that tie the 5 volt and 3.3 volt supplies to the primary 12 volt supply. The ATX power supply drives the 3.3 and 5.0 supplies to reach 90% of their values within 40 ms after the 12 volt supply reaches 90% of its value. A time delay circuit 25 delays switching the 3.3 and 5 volt dual outputs from the standby voltage supply to the active voltage supplies until after the primary 3.3 and 5 volt are at a safe operating level.

Abstract: A DC-to-DC converter includes one or more power switches, a pulse width modulation circuit for generating control pulses for the power switches, and an output inductor connected to the power switches. A thermally compensated current sensor is connected to an intrinsic current sensing element exhibiting a temperature-based parameter non-linearity. The thermally compensated current sensor has a temperature coefficient that substantially matches a temperature coefficient of an intrinsic power converter element used to measure current flow, thus linearizing the current measurement. Also, a current feedback loop circuit cooperates with the pulse width modulation circuit to control the power switches responsive to the thermally compensated current sensor.

Abstract: A DC-to-DC converter includes one or more power switches, a pulse width modulation circuit for generating control pulses for the power switches, and an output inductor connected to the power switches. A thermally compensated current sensor is connected to an intrinsic current sensing element exhibiting a temperature-based parameter non-linearity. The thermally compensated current sensor has a temperature coefficient that substantially matches a temperature coefficient of an intrinsic power converter element used to measure current flow, thus linearizing the current measurement. Also, a current feedback loop circuit cooperates with the pulse width modulation circuit to control the power switches responsive to the thermally compensated current sensor.

Abstract: A DC-to-DC converter includes one or more power switches, a pulse width modulation circuit for generating control pulses for the power switches, and an output inductor connected to the power switches. A thermally compensated current sensor is connected to an intrinsic current sensing element exhibiting a temperature-based parameter non-linearity. The thermally compensated current sensor has a temperature coefficient that substantially matches a temperature coefficient of an intrinsic power converter element used to measure current flow, thus linearizing the current measurement. Also, a current feedback loop circuit cooperates with the pulse width modulation circuit to control the power switches responsive to the thermally compensated current sensor.

Abstract: A DC-to-DC converter includes one or more power switches, a pulse width modulation circuit for generating control pulses for the power switches, and an output inductor connected to the power switches. A thermally compensated current sensor is connected to an intrinsic current sensing element exhibiting a temperature-based parameter non-linearity. The thermally compensated current sensor has a temperature coefficient that substantially matches a temperature coefficient of an intrinsic power converter element used to measure current flow, thus linearizing the current measurement. Also, a current feedback loop circuit cooperates with the pulse width modulation circuit to control the power switches responsive to the thermally compensated current sensor.

Abstract: A DC-to-DC converter includes one or more power switches, a pulse width modulation circuit for generating control pulses for the power switches, and an output inductor connected to the power switches. A thermally compensated current sensor is connected to an intrinsic current sensing element exhibiting a temperature-based parameter non-linearity. The thermally compensated current sensor has a temperature coefficient that substantially matches a temperature coefficient of an intrinsic power converter element used to measure current flow, thus linearizing the current measurement. Also, a current feedback loop circuit cooperates with the pulse width modulation circuit to control the power switches responsive to the thermally compensated current sensor.

Abstract: The integrated control circuit is for an electronic circuit, such as a DC-to-DC converter, using current sense information developed across an intrinsic circuit element of the electronic circuit. The integrated control circuit includes a temperature sensor to sense a temperature rise induced by the intrinsic circuit element of the electronic circuit. The temperature error signal and a feedback signal from the intrinsic circuit element of the converter are combined to provide a temperature-corrected feedback signal to a control unit for the converter.

Abstract: A DC-to-DC converter includes one or more power switches, a pulse width modulation circuit for generating control pulses for the power switches, and an output inductor connected to the power switches. A thermally compensated current sensor is connected to an intrinsic current sensing element exhibiting a temperature-based parameter non-linearity. The thermally compensated current sensor has a temperature coefficient that substantially matches a temperature coefficient of an intrinsic power converter element used to measure current flow, thus linearizing the current measurement. Also, a current feedback loop circuit cooperates with the pulse width modulation circuit to control the power switches responsive to the thermally compensated current sensor.

Abstract: A DC-to-DC converter includes one or more power switches, a pulse width modulation circuit for generating control pulses for the power switches, and an output inductor connected to the power switches. A thermally compensated current sensor is connected to an intrinsic current sensing element exhibiting a temperature-based parameter non-linearity. The thermally compensated current sensor has a temperature coefficient that substantially matches a temperature coefficient of an intrinsic power converter element used to measure current flow, thus linearizing the current measurement. Also, a current feedback loop circuit cooperates with the pulse width modulation circuit to control the power switches responsive to the thermally compensated current sensor.