Abstract: A physical unclonable function (PUF) circuit and a PUF system including the same are provided. The PUF circuit includes a plurality of PUF cells each configured to generate an output voltage by dividing a power voltage, a reference voltage generator configured to generate a first reference voltage by dividing the power voltage, and a comparing unit configured to sequentially compare the output voltages of the plurality of PUF cells with the first reference voltage to output data values of the plurality of PUF cells.

Abstract: A key enrollment method of a physically unclonable function (PUF) circuit including a plurality of PUF cells includes receiving a first level key from PUF cells, performing bit encoding on the first level key using a bit coding table based on Hamming weights of a plurality of bits in the first level key to generate a second level key, storing first helper data associated with the second level key in a non-volatile memory, performing block encoding on the second level key using an error correction code to generate a third level key, and storing second helper data associated with the third level key in the non-volatile memory.

Abstract: A random number generator may include a first meta-stable inverter having an input terminal and an output terminal connected to each other and configured to generate a meta-stable voltage, an amplifier configured to amplify the meta-stable voltage, control circuitry configured to adjust a threshold voltage of the meta-stable voltage, and a sampler configured to generate a random number based on sampling the meta-stable voltage. The random number generator may be configured to be operated according to different modes of operation of a plurality of modes of operation. The amplifier may be a second meta-stable inverter configured to amplify the meta-stable voltage or include an input terminal and an output terminal that are connected to each other based on the random number generator being operated according to a first mode of operation or a second mode of operation, respectively, of the plurality of modes of operation.

Abstract: A key enrollment method of a physically unclonable function (PUF) circuit including a plurality of PUF cells includes receiving a first level key from PUF cells, performing bit encoding on the first level key using a bit coding table based on Hamming weights of a plurality of bits in the first level key to generate a second level key, storing first helper data associated with the second level key in a non-volatile memory, performing block encoding on the second level key using an error correction code to generate a third level key, and storing second helper data associated with the third level key in the non-volatile memory.

Abstract: A random number generator may include a first meta-stable inverter having an input terminal and an output terminal connected to each other and configured to generate a meta-stable voltage, an amplifier configured to amplify the meta-stable voltage, control circuitry configured to adjust a threshold voltage of the meta-stable voltage, and a sampler configured to generate a random number based on sampling the meta-stable voltage. The random number generator may be configured to be operated according to different modes of operation of a plurality of modes of operation. The amplifier may be a second meta-stable inverter configured to amplify the meta-stable voltage or include an input terminal and an output terminal that are connected to each other based on the random number generator being operated according to a first mode of operation or a second mode of operation, respectively, of the plurality of modes of operation.

Abstract: A random number generator includes oscillating units configured to generate entropy sources and amplify the generated entropy sources, an entropy source combination unit configured to receive the entropy sources output from the oscillating units and combine the entropy sources to increase entropy, a sampling unit configured to sample a signal output from the entropy source combination unit in response to a sampling clock, and a clock generator and control unit configured to control the oscillating units and generate the sampling clock.

Abstract: A random number generator includes a first oscillator configured to output a first oscillating signal having a first frequency. A second oscillator is configured to output a second oscillating signal having a second frequency different from the first frequency. A sampling unit is configured to receive the first and second oscillating signals. The sampling unit is configured to generate at least one entropy source by combining the received first and second oscillating signals. The sampling unit is configured to generate a random bit corresponding to the generated entropy source using a third oscillating signal. A third oscillator & control unit is configured to control the first and second oscillators and to generate the third oscillating signal. A frequency of the third oscillating signal is lower than the first and second frequencies.

Abstract: A key enrollment method of a physically unclonable function (PUF) circuit including a plurality of PUF cells includes receiving a first level key from PUF cells, performing bit encoding on the first level key using a bit coding table based on Hamming weights of a plurality of bits in the first level key to generate a second level key, storing first helper data associated with the second level key in a non-volatile memory, performing block encoding on the second level key using an error correction code to generate a third level key, and storing second helper data associated with the third level key in the non-volatile memory.

Abstract: A random number generator includes a first oscillator configured to output a first oscillating signal having a first frequency. A second oscillator is configured to output a second oscillating signal having a second frequency different from the first frequency. A sampling unit is configured to receive the first and second oscillating signals. The sampling unit is configured to generate at least one entropy source by combining the received first and second oscillating signals. The sampling unit is configured to generate a random bit corresponding to the generated entropy source using a third oscillating signal. A third oscillator & control unit is configured to control the first and second oscillators and to generate the third oscillating signal. A frequency of the third oscillating signal is lower than the first and second frequencies.

Abstract: A random number generator includes oscillating units configured to generate entropy sources and amplify the generated entropy sources, an entropy source combination unit configured to receive the entropy sources output from the oscillating units and combine the entropy sources to increase entropy, a sampling unit configured to sample a signal output from the entropy source combination unit in response to a sampling clock, and a clock generator and control unit configured to control the oscillating units and generate the sampling clock.

Abstract: A random number generator includes a signal generator and a sampling unit. The signal generator is configured to generate an alternating sequence of metastable seed signals and oscillating signals during respective first and second half-periods of a clock signal. The oscillating signals having respective phases determined by corresponding ones of the metastable seed signals in the alternating sequence. The sampling unit is configured to detect a logic value of each consecutive oscillating signal during a portion of a respective half-period of the clock signal. The signal generator may be responsive to the clock signal and the sampling unit may be responsive to a delayed version of the clock signal.

Abstract: A random number generating apparatus and method for generating a metastable state signal by using logic gates include a metastable state generating unit generating and outputting a metastable state signal; an amplifying unit receiving the metastable state signal from the metastable state generating unit, amplifying the received metastable state signal, and outputting the amplified metastable state signal; and a sampling unit receiving the amplified metastable state signal and a sampling clock, and sampling and outputting the amplified metastable state signal according to the sampling clock.

Abstract: Provided is a random number generator including: a clock generator outputting first and second control signals; a ring oscillator (RO) block receiving a meta stable voltage and performing an oscillation operation using the meta stable voltage in response to the first control signal; and a sampling unit sampling an output signal according to the oscillation operation in response to the second control signal.

Abstract: A random number generator includes a signal generator and a sampling unit. The signal generator is configured to generate an alternating sequence of metastable seed signals and oscillating signals during respective first and second half-periods of a clock signal. The oscillating signals having respective phases determined by corresponding ones of the metastable seed signals in the alternating sequence. The sampling unit is configured to detect a logic value of each consecutive oscillating signal during a portion of a respective half-period of the clock signal. The signal generator may be responsive to the clock signal and the sampling unit may be responsive to a delayed version of the clock signal.

Abstract: A random number generating apparatus and method for generating a metastable state signal by using logic gates include a metastable state generating unit generating and outputting a metastable state signal; an amplifying unit receiving the metastable state signal from the metastable state generating unit, amplifying the received metastable state signal, and outputting the amplified metastable state signal; and a sampling unit receiving the amplified metastable state signal and a sampling clock, and sampling and outputting the amplified metastable state signal according to the sampling clock.

Abstract: Provided is a random number generator including: a clock generator outputting first and second control signals; a ring oscillator (RO) block receiving a meta stable voltage and performing an oscillation operation using the meta stable voltage in response to the first control signal; and a sampling unit sampling an output signal according to the oscillation operation in response to the second control signal.