Abstract: A hot-carrier injection (HCI) test that permits rapid screening of integrated circuit wafers susceptible to possible HCI-induced failures is disclosed. A method is described that determines transistor stress voltages that results in a transistor HCI-induced post-stress drain current differing from a pre-stress drain current within a desired range. These stress voltages are determined using a wafer with acceptable HCI susceptibility. Additional wafers to be tested are first tested using a described method that uses the determined transistor stress voltages to quickly screen the wafers for HCI susceptibility and, if HCI susceptibility is found, then additional conventional HCI testing may be applied to the susceptible wafers.

Abstract: Reliability testing circuitry is built into the wafer or IC package in the form of one or more individual testers that use small-area transistors as DUTs. Stress can be applied to the DUTs in parallel and information about breakdown, wearout or failure can be obtained from the individual testers. Only a few pads are needed to test hundreds and even thousands of the DUTs of the individual testers. Testing of many DUTs may be performed using a simple power supply and a few probes.