Patents by Inventor Bor-Ping Jang

Bor-Ping Jang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9484226
    Abstract: A method includes placing a plurality of dummy dies over a carrier, placing a plurality of device dies over the carrier, molding the plurality of dummy dies and the plurality of device dies in a molding compound, forming redistribution line over and electrically coupled to the device dies, and performing a die-saw to separate the device dies and the molding compound into a plurality of packages.
    Type: Grant
    Filed: May 29, 2015
    Date of Patent: November 1, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien Ling Hwang, Bor-Ping Jang, Hsin-Hung Liao, Yeong-Jyh Lin, Hsiao-Chung Liang, Chung-Shi Liu
  • Publication number: 20160240451
    Abstract: A semiconductor package includes a carrier, at least and adhesive portion, a plurality of micro pins and a die. The carrier has a first surface and second surface opposite to the first surface. The adhesive portion is disposed on the first surface, and the plurality of the micro pins is disposed in the adhesive portions. The die is disposed on the remaining adhesive portion free of the micro pins.
    Type: Application
    Filed: February 13, 2015
    Publication date: August 18, 2016
    Inventors: Chien-Ling HWANG, Bor-Ping JANG, Chung-Shi LIU, Hsin-Hung LIAO, Ying-Jui HUANG
  • Publication number: 20160099165
    Abstract: A method of manufacturing a semiconductor device comprises providing a carrier, disposing a plurality of dies over the carrier along a first direction and a second direction orthogonal to the first direction to arrange the plurality of dies in a plurality of rows, and shifting one of the plurality of rows along the first direction or the second direction in a predetermined distance.
    Type: Application
    Filed: December 14, 2015
    Publication date: April 7, 2016
    Inventors: BOR-PING JANG, CHIEN LING HWANG, HSIN-HUNG LIAO, YEONG-JYH LIN
  • Patent number: 9236351
    Abstract: A semiconductor device includes a carrier, several dies disposed on a surface of the carrier and several scribing lines defined on the surface of the carrier. The scribing lines include several continuous lines along a first direction and several discontinuous lines along a second direction. Further, a method of dies singulation includes providing a carrier, disposing several dies on a surface of the carrier according to several scribing lines including several continuous lines along a first direction and several discontinuous lines along a second direction, cutting the carrier according to the continuous lines along the first direction, and cutting the carrier according to the discontinuous lines along the second direction.
    Type: Grant
    Filed: October 9, 2013
    Date of Patent: January 12, 2016
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Bor-Ping Jang, Chien Ling Hwang, Hsin-Hung Liao, Yeong-Jyh Lin
  • Publication number: 20150371860
    Abstract: A method for thinning a wafer is provided. The method includes placing a wafer on a support assembly and securing an etching mask to a backside of the wafer. The etching mask covers a peripheral portion of the wafer. The method further includes performing a wet etching process on the backside of the wafer to form a thinned wafer, and the thinned wafer includes peripheral portions having a first thickness and a central portion having a second thickness smaller than the first thickness. A system for forming the thinned wafer is also provided.
    Type: Application
    Filed: September 1, 2015
    Publication date: December 24, 2015
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chien Ling HWANG, Bor-Ping JANG, Hsin-Hung LIAO, Chung-Shi LIU
  • Publication number: 20150364456
    Abstract: An apparatus includes a mold chase, which includes a top portion and an edge ring having a ring-shape. The edge ring is underlying and connected to an edge of the top portion. The edge ring has an injection port and a venting port. A molding guide kit is configured to be inserted into the injection port. The molding guide kit includes a front sidewall having a curved front edge.
    Type: Application
    Filed: June 12, 2014
    Publication date: December 17, 2015
    Inventors: Chen-Hua Yu, Chung-Shi Liu, Hui-Min Huang, Chih-Fan Huang, Ming-Da Cheng, Meng-Tse Chen, Bor-Ping Jang, Chien Ling Hwang
  • Publication number: 20150262845
    Abstract: A method includes placing a plurality of dummy dies over a carrier, placing a plurality of device dies over the carrier, molding the plurality of dummy dies and the plurality of device dies in a molding compound, forming redistribution line over and electrically coupled to the device dies, and performing a die-saw to separate the device dies and the molding compound into a plurality of packages.
    Type: Application
    Filed: May 29, 2015
    Publication date: September 17, 2015
    Inventors: Chien Ling Hwang, Bor-Ping Jang, Hsin-Hung Liao, Yeong-Jyh Lin, Hsiao-Chung Liang, Chung-Shi Liu
  • Patent number: 9129899
    Abstract: Embodiments of a method for thinning a wafer are provided. The method includes placing a wafer on a support assembly and securing an etching mask to a backside of the wafer. The etching mask covers a peripheral portion of the wafer. The method further includes performing a wet etching process on the backside of the wafer to form a thinned wafer, and the thinned wafer includes peripheral portions having a first thickness and a central portion having a second thickness smaller than the first thickness. Embodiments of system for forming the thinned wafer are also provided.
    Type: Grant
    Filed: July 17, 2013
    Date of Patent: September 8, 2015
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chien-Ling Hwang, Bor-Ping Jang, Hsin-Hung Liao, Chung-Shi Liu
  • Patent number: 9093337
    Abstract: A method includes placing a plurality of dummy dies over a carrier, placing a plurality of device dies over the carrier, molding the plurality of dummy dies and the plurality of device dies in a molding compound, forming redistribution line over and electrically coupled to the device dies, and performing a die-saw to separate the device dies and the molding compound into a plurality of packages.
    Type: Grant
    Filed: September 27, 2013
    Date of Patent: July 28, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien Ling Hwang, Bor-Ping Jang, Hsin-Hung Liao, Yeong-Jyh Lin, Hsiao-Chung Liang, Chung-Shi Liu
  • Patent number: 9085049
    Abstract: A method for manufacturing a semiconductor device is provided. The method contains steps of providing the semiconductor device including a working area; directing a medium flow onto the working area; configuring a lens in contact with the medium flow; and directing a laser beam to the working area through the lens and the medium flow. A laser processing for manufacturing a semiconductor device is also provided.
    Type: Grant
    Filed: November 30, 2012
    Date of Patent: July 21, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Ling Hwang, Bor-Ping Jang, Yi-Li Hsiao, Hsin-Hung Liao, Chung-Shi Liu
  • Patent number: 9082636
    Abstract: Packaging methods and structures for semiconductor devices are disclosed. In one embodiment, a packaged semiconductor device includes a redistribution layer (RDL) having a first surface and a second surface opposite the first surface. At least one integrated circuit is coupled to the first surface of the RDL, and a plurality of metal bumps is coupled to the second surface of the RDL. A molding compound is disposed over the at least one integrated circuit and the first surface of the RDL.
    Type: Grant
    Filed: October 24, 2014
    Date of Patent: July 14, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Wei Lin, Kuei-Wei Huang, Yu-Peng Tsai, Chun-Cheng Lin, Meng-Tse Chen, Chen-Hua Yu, Mirng-Ji Lii, Chung-Shi Liu, Bor-Ping Jang, Hsiu-Jen Lin, Wen-Hsiung Lu, Ming-Da Cheng, Wei-Hung Lin
  • Publication number: 20150130111
    Abstract: A mold includes a top portion, and an edge ring having a ring-shape. The edge ring is underlying and connected to edges of the top portion. The edge ring includes air vents. The edge ring further encircles the inner space under the top portion of the mold. A plurality of injection ports is connected to the inner space of the mold. The plurality of injection ports is substantially aligned to a straight line crossing a center of the top portion of the mold. The plurality of injection ports has different sizes.
    Type: Application
    Filed: January 19, 2015
    Publication date: May 14, 2015
    Inventors: Bor-Ping Jang, Chung-Shi Liu, Chien Ling Hwang, Yeong-Jyh Lin
  • Publication number: 20150097272
    Abstract: A semiconductor device includes a carrier, several dies disposed on a surface of the carrier and several scribing lines defined on the surface of the carrier. The scribing lines include several continuous lines along a first direction and several discontinuous lines along a second direction. Further, a method of dies singulation includes providing a carrier, disposing several dies on a surface of the carrier according to several scribing lines including several continuous lines along a first direction and several discontinuous lines along a second direction, cutting the carrier according to the continuous lines along the first direction, and cutting the carrier according to the discontinuous lines along the second direction.
    Type: Application
    Filed: October 9, 2013
    Publication date: April 9, 2015
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: BOR-PING JANG, CHIEN LING HWANG, HSIN-HUNG LIAO, YEONG-JYH LIN
  • Publication number: 20150093858
    Abstract: A method includes placing a plurality of dummy dies over a carrier, placing a plurality of device dies over the carrier, molding the plurality of dummy dies and the plurality of device dies in a molding compound, forming redistribution line over and electrically coupled to the device dies, and performing a die-saw to separate the device dies and the molding compound into a plurality of packages.
    Type: Application
    Filed: September 27, 2013
    Publication date: April 2, 2015
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chien Ling Hwang, Bor-Ping Jang, Hsin-Hung Liao, Yeong-Jyh Lin, Hsiao-Chung Liang, Chung-Shi Liu
  • Publication number: 20150069604
    Abstract: A semiconductor device includes a substrate and a first conductive pad on a top surface of the substrate. The semiconductor device further includes a boundary structure on the top surface of the substrate around the conductive pad.
    Type: Application
    Filed: September 9, 2013
    Publication date: March 12, 2015
    Applicant: TAIWAN SEMICODUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chien Ling HWANG, Yeong-Jyh LIN, Bor-Ping JANG, Hsiao-Chung LIANG
  • Publication number: 20150044819
    Abstract: Packaging methods and structures for semiconductor devices are disclosed. In one embodiment, a packaged semiconductor device includes a redistribution layer (RDL) having a first surface and a second surface opposite the first surface. At least one integrated circuit is coupled to the first surface of the RDL, and a plurality of metal bumps is coupled to the second surface of the RDL. A molding compound is disposed over the at least one integrated circuit and the first surface of the RDL.
    Type: Application
    Filed: October 24, 2014
    Publication date: February 12, 2015
    Inventors: Chih-Wei Lin, Kuei-Wei Huang, Yu-Peng Tsai, Chun-Cheng Lin, Meng-Tse Chen, Chen-Hua Yu, Mirng-Ji Lii, Chung-Shi Liu, Bor-Ping Jang, Hsiu-Jen Lin, Wen-Hsiung Lu, Ming-Da Cheng, Wei-Hung Lin
  • Patent number: 8951037
    Abstract: A mold includes a top portion, and an edge ring having a ring-shape. The edge ring is underlying and connected to edges of the top portion. The edge ring includes air vents. The edge ring further encircles the inner space under the top portion of the mold. A plurality of injection ports is connected to the inner space of the mold. The plurality of injection ports is substantially aligned to a straight line crossing a center of the top portion of the mold. The plurality of injection ports has different sizes.
    Type: Grant
    Filed: March 2, 2012
    Date of Patent: February 10, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Bor-Ping Jang, Yeong-Jyh Lin, Chien Ling Hwang, Chung-Shi Liu
  • Publication number: 20150024606
    Abstract: Embodiments of a method for thinning a wafer are provided. The method includes placing a wafer on a support assembly and securing an etching mask to a backside of the wafer. The etching mask covers a peripheral portion of the wafer. The method further includes performing a wet etching process on the backside of the wafer to form a thinned wafer, and the thinned wafer includes peripheral portions having a first thickness and a central portion having a second thickness smaller than the first thickness. Embodiments of system for forming the thinned wafer are also provided.
    Type: Application
    Filed: July 17, 2013
    Publication date: January 22, 2015
    Inventors: Chien-Ling HWANG, Bor-Ping JANG, Hsin-Hung LIAO, Chung-Shi LIU
  • Publication number: 20150021760
    Abstract: Embodiments of mechanisms for forming a package are provided. The package includes a substrate and a contact pad formed on the substrate. The package also includes a conductive pillar bonded to the contact pad through solder formed between the conductive pillar and the contact pad. The solder is in direct contact with the conductive pillar.
    Type: Application
    Filed: July 17, 2013
    Publication date: January 22, 2015
    Inventors: Yeong-Jyh LIN, Hsin-Hung LIAO, Chien Ling HWANG, Bor-Ping JANG, Hsiao-Chung LIANG, Chung-Shi LIU
  • Publication number: 20150008581
    Abstract: A method of packaging includes placing a package component over a release film, wherein solder regions on a surface of the package component are in physical contact with the release film. Next, A molding compound filled between the release film and the package component is cured, wherein during the step of curing, the solder regions remain in physical contact with the release film.
    Type: Application
    Filed: September 23, 2014
    Publication date: January 8, 2015
    Inventors: Meng-Tse Chen, Wei-Hung Lin, Sheng-Yu Wu, Bor-Ping Jang, Ming-Da Cheng, Chung-Shi Liu, Hsiu-Jen Lin, Wen-Hsiung Lu, Chih-Wei Lin, Yu-Peng Tsai, Kuei-Wei Huang, Chun-Cheng Lin