Patents by Inventor Boris Grot
Boris Grot has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11544066Abstract: A branch target buffer, BTB, is provided to store at least one BTB entry corresponding to a respective branch in a control flow in a sequence of machine-readable instructions of a computer program. The BTB has a tag field to compare with a program counter of a fetch address generator and at least one further field to store information characteristic of the branch instruction identified by the corresponding tag field and allowing a conditional branch to be distinguished from an unconditional branch instruction. The BTB has a predetermined storage capacity and is utilized such that unconditional branch instructions are preferentially allocated storage space in the BTB relative to conditional branch instructions.Type: GrantFiled: February 11, 2019Date of Patent: January 3, 2023Assignee: The University Court of the University of EdinburghInventors: Rakesh Kumar, Boris Grot, Vijay Nagarajan
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Patent number: 11269641Abstract: A data processing apparatus is provided having branch prediction circuitry, the branch prediction circuitry having a Branch Target Buffer, BTB. A fetch target queue receives entries corresponding to a sequence of instruction addresses, at least one of the sequence having been predicted using the branch prediction circuitry. A fetch engine is provided to fetch instruction addresses taken from a top of the fetch target queue whilst a prefetch engine sends a prefetch probe to an instruction cache. The BTB is to detect a BTB miss when attempting to populate a storage slot of the fetch target queue and the BTB triggers issuance of a BTB miss probe to the memory to fetch at least one instruction from the memory to resolve the BTB miss using branch-prediction based prefetching.Type: GrantFiled: February 1, 2018Date of Patent: March 8, 2022Assignee: THE UNIVERSITY COURT OF THE UNIVERSITY OF EDINBURGHInventors: Rakesh Kumar, Boris Grot, Vijay Nagarajan, Cheng Chieh Huang
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Publication number: 20210004233Abstract: A branch target buffer, BTB, is provided to store at least one BTB entry corresponding to a respective branch in a control flow in a sequence of machine-readable instructions of a computer program. The BTB has a tag field to compare with a program counter of a fetch address generator and at least one further field to store information characteristic of the branch instruction identified by the corresponding tag field and allowing a conditional branch to be distinguished from an unconditional branch instruction. The BTB has a predetermined storage capacity and is utilized such that unconditional branch instructions are preferentially allocated storage space in the BTB relative to conditional branch instructions.Type: ApplicationFiled: February 11, 2019Publication date: January 7, 2021Inventors: Rakesh Kumar, Boris Grot, Vijay Nagarajan
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Publication number: 20200004543Abstract: A data processing apparatus is provided having branch prediction circuitry, the branch prediction circuitry having a Branch Target Buffer, BTB. A fetch target queue receives entries corresponding to a sequence of instruction addresses, at least one of the sequence having been predicted using the branch prediction circuitry. A fetch engine is provided to fetch instruction addresses taken from a top of the fetch target queue whilst a prefetch engine sends a prefetch probe to an instruction cache. The BTB is to detect a BTB miss when attempting to populate a storage slot of the fetch target queue and the BTB triggers issuance of a BTB miss probe to the memory to fetch at least one instruction from the memory to resolve the BTB miss using branch-prediction based prefetching.Type: ApplicationFiled: February 1, 2018Publication date: January 2, 2020Inventors: RAKESH KUMAR, BORIS GROT, VIJAY NAGARAJAN, CHENG CHIEH HUANG
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Patent number: 9703707Abstract: A NOC comprises a die having a cache and a core area, a plurality of core tiles arranged in the core area in a plurality of subsets, at least one cache memory bank arranged in the cache area, whereby the at least one cache memory bank is distinct from each of the plurality of core files. The NOC further comprises an interconnect fabric comprising a request tree to connect to a first cache memory bank of the at least one cache memory bank, each core tile of a first one of the subsets, the first subset corresponding to the first cache memory bank, such that each core tile is connected to the first cache memory bank only, and a reply tree to connect the first cache memory bank to each core tile of the first subset.Type: GrantFiled: December 4, 2012Date of Patent: July 11, 2017Assignee: Ecole Polytechnique Fédérale de Lausanne (EPFL)Inventors: Babak Falsafi, Boris Grot, Pejman Lotfi Kamran
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Patent number: 9571399Abstract: The present disclosure relates to an example of a method for a first router to adaptively determine status within a network. The network may include the first router, a second router and a third router. The method for the first router may comprise determining status information regarding the second router located in the network, and transmitting the status information to the third router located in the network. The second router and the third router may be indirectly coupled to one another.Type: GrantFiled: April 7, 2014Date of Patent: February 14, 2017Assignee: THE BOARD OF REGENTS OF THE UNIVERSITY OF TEXAS SYSTEMInventors: Paul Gratz, Boris Grot, Stephen W. Keckler
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Publication number: 20140219097Abstract: The present disclosure relates to an example of a method for a first router to adaptively determine status within a network. The network may include the first router, a second router and a third router. The method for the first router may comprise determining status information regarding the second router located in the network, and transmitting the status information to the third router located in the network. The second router and the third router may be indirectly coupled to one another.Type: ApplicationFiled: April 7, 2014Publication date: August 7, 2014Applicant: The Board of Regents of the University of Texas SystemInventors: Paul Gratz, Boris Grot, Steven W. Keckler
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Publication number: 20140156929Abstract: A Network-On-Chip (NOC) organization comprises a die having a cache area and a core area, a plurality of core tiles arranged in the core area in a plurality of subsets, at least one cache memory bank arranged in the cache area, whereby the at least one cache memory bank is distinct from each of the plurality of core tiles. The NOC organization further comprises an interconnect fabric comprising a request tree to connect to a first cache memory bank of the at least one cache memory bank, each core tile of a first one of the subsets, the first subset corresponding to the first cache memory bank, such that each core tile of the first subset is connected to the first cache memory bank only, and allow guiding data packets from each core tile of the first subset to the first memory bank, and a reply tree to connect the first cache memory bank to each core tile of the first subset, and allow guiding data packets from the first cache memory bank to a core tile of the first subset.Type: ApplicationFiled: December 4, 2012Publication date: June 5, 2014Applicant: ECOLE POLYTECHNIQUE FEDERALE DE LAUSANNE (EPFL)Inventors: Babak FALSAFI, Boris GROT, Pejman LOTFI KAMRAN
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Patent number: 8694704Abstract: The present disclosure relates to an example of a method for a first router to adaptively determine status within a network. The network may include the first router, a second router and a third router. The method for the first router may comprise determining status information regarding the second router located in the network, and transmitting the status information to the third router located in the network. The second router and the third router may be indirectly coupled to one another.Type: GrantFiled: September 13, 2012Date of Patent: April 8, 2014Assignee: Board of Regents, University of Texas SystemsInventors: Paul Gratz, Boris Grot, Steven W. Keckler
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Publication number: 20130064091Abstract: The present disclosure relates to an example of a method for a first router to adaptively determine status within a network. The network may include the first router, a second router and a third router. The method for the first router may comprise determining status information regarding the second router located in the network, and transmitting the status information to the third router located in the network. The second router and the third router may be indirectly coupled to one another.Type: ApplicationFiled: September 13, 2012Publication date: March 14, 2013Applicant: The Board of Regents of the University of Texas SystemInventors: Paul Gratz, Boris Grot, Stephan W. Keckler
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Patent number: 8307116Abstract: The present disclosure generally relates to systems for routing data across a multinodal network. Example systems include a multinodal array having a plurality of nodes and a plurality of physical communication channels connecting the nodes. At least one of the physical communication channels may be configured to route data from a first node to two or more other destination nodes of the plurality of nodes. The present disclosure also generally relates to methods for routing data across a multinodal network and computer accessible mediums having stored thereon computer executable instructions for performing techniques for routing data across a multinodal network.Type: GrantFiled: June 19, 2009Date of Patent: November 6, 2012Assignee: Board of Regents of the University of Texas SystemInventors: Stephen W. Keckler, Boris Grot
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Patent number: 8285900Abstract: The present disclosure relates to an example of a method for a first router to adaptively determine status within a network. The network may include the first router, a second router and a third router. The method for the first router may comprise determining status information regarding the second router located in the network, and transmitting the status information to the third router located in the network. The second router and the third router may be indirectly coupled to one another.Type: GrantFiled: February 17, 2009Date of Patent: October 9, 2012Assignee: The Board of Regents of the University of Texas SystemInventors: Paul Gratz, Boris Grot, Stephen W. Keckler
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Publication number: 20100325308Abstract: The present disclosure generally relates to systems for routing data across a multinodal network. Example systems include a multinodal array having a plurality of nodes and a plurality of physical communication channels connecting the nodes. At least one of the physical communication channels may be configured to route data from a first node to two or more other destination nodes of the plurality of nodes. The present disclosure also generally relates to methods for routing data across a multinodal network and computer accessible mediums having stored thereon computer executable instructions for performing techniques for routing data across a multinodal network.Type: ApplicationFiled: June 19, 2009Publication date: December 23, 2010Inventors: Stephen W. Keckler, Boris Grot
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Publication number: 20100211718Abstract: The present disclosure relates to an example of a method for a first router to adaptively determine status within a network. The network may include the first router, a second router and a third router. The method for the first router may comprise determining status information regarding the second router located in the network, and transmitting the status information to the third router located in the network. The second router and the third router may be indirectly coupled to one another.Type: ApplicationFiled: February 17, 2009Publication date: August 19, 2010Inventors: Paul Gratz, Boris Grot, Stephen W. Keckler