Abstract: A control circuit for a power factor correction (PFC) circuit, the control circuit includes a multiplier having first, second, and third multiplier inputs and a multiplier output. The control circuit has an adder having first and second inputs and an output. The first input of the adder is coupled to the multiplier output. The control circuit further includes a root mean square (RMS) calculation circuit configured to determine a square of a root mean square of an input sinusoidal voltage. The RMS calculation circuit has an output coupled to the second multiplier input. An input voltage square calculation circuit is configured to determine a square of the input sinusoidal voltage. The input voltage square calculation circuit has an output coupled to the third multiplier input.

Abstract: In some examples, an apparatus includes: a ramp generation circuit having a ramp control input and a ramp output, the ramp control input coupled to a power factor correction (PFC) output terminal; a comparator having a comparator output and first and second comparator inputs, the first comparator input coupled to the ramp output, the second comparator input coupled to a PFC switch current sensing terminal; and a pulse width modulation (PWM) generation circuit having a PWM control input and a PWM output, the PWM control input coupled to the comparator output, and the PWM output coupled to a PFC switch control terminal.

Abstract: A control circuit for a power factor correction (PFC) circuit, the control circuit includes a multiplier having first, second, and third multiplier inputs and a multiplier output. The control circuit has an adder having first and second inputs and an output. The first input of the adder is coupled to the multiplier output. The control circuit further includes a root mean square (RMS) calculation circuit configured to determine a square of a root mean square of an input sinusoidal voltage. The RMS calculation circuit has an output coupled to the second multiplier input. An input voltage square calculation circuit is configured to determine a square of the input sinusoidal voltage. The input voltage square calculation circuit has an output coupled to the third multiplier input.

Abstract: A control circuit for a power factor correction (PFC) circuit, the control circuit includes a multiplier having first, second, and third multiplier inputs and a multiplier output. The control circuit has an adder having first and second inputs and an output. The first input of the adder is coupled to the multiplier output. The control circuit further includes a root mean square (RMS) calculation circuit configured to determine a square of a root mean square of an input sinusoidal voltage. The RMS calculation circuit has an output coupled to the second multiplier input. An input voltage square calculation circuit is configured to determine a square of the input sinusoidal voltage. The input voltage square calculation circuit has an output coupled to the third multiplier input.

Abstract: As disclosed herein, a PFC control device, may be used for power factor correction and for input power and current measurement simultaneously. To determine the input power, input voltage and input current are determined. These measurements may be performed using a current sensor and a voltage sensor, for example. In an example embodiment of the systems and methods of input power and current measurement disclosed herein, the current is measured after an electromagnetic interference (EMI) filter. The input voltage and input current should be sampled substantially simultaneously. The measured input current is adjusted due to a phase shift introduced in the current sense circuit. The input voltage and input current should be sampled substantially simultaneously. The input power is determined using the PFC input voltage and the adjusted input current. The total input current is determined using the PFC input current and the EMI filter reactive current.

Abstract: A method of operating a power factor correction (PFC) circuit and a corresponding power factor correction circuit include determining an adaptive switching frequency of the PFC circuit related to a current of the boost inductor of the PFC circuit, and operating the PFC circuit at a light load based on the adaptive switching frequency.

Abstract: One embodiment relates to an LLC resonant power converter system. The system includes a transformer comprising a primary inductor and a secondary inductor and a switch control stage configured to generate a plurality of switching signals having a duty-cycle. The system also includes an input stage comprising the primary inductor and a plurality of switches that are controlled in response to the respective plurality of switching signals to generate a primary resonant current and an output stage comprising the secondary inductor and being configured to conduct an output current through a load based on a secondary resonant current to generate an output voltage. The system further includes a controller configured to limit a magnitude of the output current to a predetermined magnitude in response to variations of the load.

Abstract: As disclosed herein, a PFC control device, may be used for power factor correction and for input power and current measurement simultaneously. To determine the input power, input voltage and input current are determined. These measurements may be performed using a current sensor and a voltage sensor, for example. In an example embodiment of the systems and methods of input power and current measurement disclosed herein, the current is measured after an electromagnetic interference (EMI) filter. The input voltage and input current should be sampled substantially simultaneously. The measured input current is adjusted due to a phase shift introduced in the current sense circuit. The input voltage and input current should be sampled substantially simultaneously. The input power is determined using the PFC input voltage and the adjusted input current. The total input current is determined using the PFC input current and the EMI filter reactive current.

Abstract: One embodiment relates to an LLC resonant power converter system. The system includes a transformer comprising a primary inductor and a secondary inductor and a switch control stage configured to generate a plurality of switching signals having a duty-cycle. The system also includes an input stage comprising the primary inductor and a plurality of switches that are controlled in response to the respective plurality of switching signals to generate a primary resonant current and an output stage comprising the secondary inductor and being configured to conduct an output current through a load based on a secondary resonant current to generate an output voltage. The system further includes a controller configured to limit a magnitude of the output current to a predetermined magnitude in response to variations of the load.

Abstract: A method of operating a power factor correction (PFC) circuit and a corresponding power factor correction circuit include determining an adaptive switching frequency of the PFC circuit related to a current of the boost inductor of the PFC circuit, and operating the PFC circuit at a light load based on the adaptive switching frequency.

Abstract: An embodiment of the invention provides a method of reducing surge current in an LLC converter. The LLC converter comprises a switching circuit having a first switch and a second switch, a resonant circuit, and a rectification circuit. During start up of the LLC converter, first and second signals having a fixed period and a variable duty cycle are applied to the first and second switches respectively. When a predetermined voltage on a load configured to be coupled to the rectification circuit is reached, the first and second signals are changed to signals having a variable period and a fixed duty cycle.

Abstract: Systems and methods of resonant DC/DC conversion disclosed herein improve the basic resonant converter designs by proactively setting and coordinating the gate drive timings between the primary side and secondary side. By proactively setting and coordinating gate drives timings between the primary side and secondary side, both efficiency and transient performance optimizations may be achieved with or without diode emulation mode, depending on whether the switching frequency is below resonance or above resonance, and the nature of the load characteristics. If the switching frequency of the converter is determined to be at or below the resonance frequency, the output transistors may be configured to be fully active at or above a predetermined output load current. The turn-on timing of the output transistors is dependant on the load for a given output voltage, and is almost independent of input voltage. Turn-on timing may be significantly different at light load to no load.

Abstract: An embodiment of the invention provides a method of reducing surge current in an LLC converter. The LLC converter comprises a switching circuit having a first switch and a second switch, a resonant circuit, and a rectification circuit. During start up of the LLC converter, first and second signals having a fixed period and a variable duty cycle are applied to the first and second switches respectively. When a predetermined voltage on a load configured to be coupled to the rectification circuit is reached, the first and second signals are changed to signals having a variable period and a fixed duty cycle.