Patents by Inventor Brad Hutchings

Brad Hutchings has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9659124
    Abstract: Some embodiments provide a method of monitoring the implementation of a user design in a configurable integrated circuit (IC). The method receives a user design for an IC and optimizes the user design to produce a second IC design. The optimization results in the elimination of circuit element(s). The method defines the second IC design for the configurable IC and generates output data for the eliminated circuit element(s) to allow for monitoring the user design.
    Type: Grant
    Filed: November 26, 2014
    Date of Patent: May 23, 2017
    Assignee: Altera Corporation
    Inventors: Brad Hutchings, Andrew Caldwell, Steven Teig
  • Patent number: 9606176
    Abstract: Some embodiments provide an integrated circuit (“IC”) with a primary circuit structure. The primary circuit structure is for performing multiple operations that implement a user design. The primary circuit structure includes multiple circuits. The IC also includes a secondary monitoring structure for monitoring multiple operations. The secondary monitoring structure includes a network communicatively coupled to multiple circuits of the primary circuit structure. The secondary monitoring circuit structure is for analyzing the monitored operations and reporting on the analysis to a circuit outside of the IC.
    Type: Grant
    Filed: February 20, 2015
    Date of Patent: March 28, 2017
    Assignee: Altera Corporation
    Inventors: Marc Miller, Steven Teig, Jason Redgrave, Brad Hutchings, Danny Thom
  • Patent number: 9494967
    Abstract: Some embodiments provide an integrated circuit (“IC”). The IC includes multiple configurable circuits that configurably perform operations of a user design based on configuration data. The IC also includes a configurable trigger circuit that receives a set of configuration data that specifies an operational event. The configurable trigger circuit also determines whether the operational event has occurred during implementation of the user design of the IC. Additionally, the operational trigger event outputs a trigger signal upon determining that the operational trigger event has occurred.
    Type: Grant
    Filed: May 15, 2014
    Date of Patent: November 15, 2016
    Assignee: Altera Corporation
    Inventors: Brad Hutchings, Jason Redgrave, Dai Huang, Steven Teig
  • Patent number: 9385725
    Abstract: Some embodiments of the invention provide a configurable integrated circuit (IC) that has several configurable circuits for configurably performing different operations. During the operation of the IC, each particular configurable circuit performs a particular operation that is specified by a particular configuration data set for the particular configurable circuit. While the IC operates and a first set of configurable circuits performs a first set of operations, configuration data is loaded from the outside of the IC for configuring a second set of configurable circuits. In some embodiments, the configurable IC includes a configuration network for rapid loading configuration data in the IC from outside of the IC. In some of these embodiments, the configuration network is a pipelined network.
    Type: Grant
    Filed: March 20, 2015
    Date of Patent: July 5, 2016
    Assignee: Altera Corporation
    Inventors: Brad Hutchings, Jason Redgrave, Teju Khubchandani, Herman Schmit, Steven Teig
  • Publication number: 20160028399
    Abstract: Some embodiments of the invention provide a configurable integrated circuit (IC) that has several configurable circuits for configurably performing different operations. During the operation of the IC, each particular configurable circuit performs a particular operation that is specified by a particular configuration data set for the particular configurable circuit. While the IC operates and a first set of configurable circuits performs a first set of operations, configuration data is loaded from the outside of the IC for configuring a second set of configurable circuits. In some embodiments, the configurable IC includes a configuration network for rapid loading configuration data in the IC from outside of the IC. In some of these embodiments, the configuration network is a pipelined network.
    Type: Application
    Filed: March 20, 2015
    Publication date: January 28, 2016
    Inventors: Brad Hutchings, Jason Redgrave, Teju Khubchandani, Herman Schmit, Steven Teig
  • Publication number: 20150234008
    Abstract: Some embodiments provide an integrated circuit (“IC”) with a primary circuit structure. The primary circuit structure is for performing multiple operations that implement a user design. The primary circuit structure includes multiple circuits. The IC also includes a secondary monitoring structure for monitoring multiple operations. The secondary monitoring structure includes a network communicatively coupled to multiple circuits of the primary circuit structure. The secondary monitoring circuit structure is for analyzing the monitored operations and reporting on the analysis to a circuit outside of the IC.
    Type: Application
    Filed: February 20, 2015
    Publication date: August 20, 2015
    Inventors: Marc Miller, Steven Teig, Jason Redgrave, Brad Hutchings, Danny Thom
  • Publication number: 20150154332
    Abstract: Some embodiments provide a method of monitoring the implementation of a user design in a configurable integrated circuit (IC). The method receives a user design for an IC and optimizes the user design to produce a second IC design. The optimization results in the elimination of circuit element(s). The method defines the second IC design for the configurable IC and generates output data for the eliminated circuit element(s) to allow for monitoring the user design.
    Type: Application
    Filed: November 26, 2014
    Publication date: June 4, 2015
    Inventors: Brad Hutchings, Andrew Caldwell, Steven Teig
  • Patent number: 9018978
    Abstract: A novel configurable integrated circuit (IC) that has several configurable circuits for configurably performing different operations is provided. During the operation of the IC, each particular configurable circuit performs a particular operation that is specified by a particular configuration data set for the particular configurable circuit. While the IC operates and a first set of configurable circuits performs a first set of operations, configuration data is loaded from the outside of the IC for configuring a second set of configurable circuits. The configurable IC includes a configuration network for rapid loading configuration data in the IC from outside of the IC. The configuration network is a pipelined network.
    Type: Grant
    Filed: April 25, 2014
    Date of Patent: April 28, 2015
    Assignee: Tabula, Inc.
    Inventors: Brad Hutchings, Jason Redgrave, Teju Khubchandani, Herman Schmit, Steven Teig
  • Patent number: 8990651
    Abstract: Some embodiments provide an integrated circuit (“IC”) with a primary circuit structure. The primary circuit structure is for performing multiple operations that implement a user design. The primary circuit structure includes multiple circuits. The IC also includes a secondary monitoring structure for monitoring multiple operations. The secondary monitoring structure includes a network communicatively coupled to multiple circuits of the primary circuit structure. The secondary monitoring circuit structure is for analyzing the monitored operations and reporting on the analysis to a circuit outside of the IC.
    Type: Grant
    Filed: September 19, 2008
    Date of Patent: March 24, 2015
    Assignee: Tabula, Inc.
    Inventors: Marc Miller, Steven Teig, Brad Hutchings
  • Patent number: 8935640
    Abstract: Some embodiments provide a method of monitoring the implementation of a user design in a configurable integrated circuit (IC). The method receives a user design for an IC and optimizes the user design to produce a second IC design. The optimization results in the elimination of circuit element(s). The method defines the second IC design for the configurable IC and generates output data for the eliminated circuit element(s) to allow for monitoring the user design.
    Type: Grant
    Filed: April 17, 2013
    Date of Patent: January 13, 2015
    Assignee: Tabula, Inc.
    Inventors: Brad Hutchings, Andrew Caldwell, Steven Teig
  • Publication number: 20140337660
    Abstract: Some embodiments provide an integrated circuit (“IC”). The IC includes multiple configurable circuits that configurably perform operations of a user design based on configuration data. The IC also includes a configurable trigger circuit that receives a set of configuration data that specifies an operational event. The configurable trigger circuit also determines whether the operational event has occurred during implementation of the user design of the IC. Additionally, the operational trigger event outputs a trigger signal upon determining that the operational trigger event has occurred.
    Type: Application
    Filed: May 15, 2014
    Publication date: November 13, 2014
    Applicant: Tabula, Inc.
    Inventors: Brad Hutchings, Jason Redgrave, Dai Huang, Steven Teig
  • Publication number: 20140320165
    Abstract: Some embodiments of the invention provide a configurable integrated circuit (IC) that has several configurable circuits for configurably performing different operations. During the operation of the IC, each particular configurable circuit performs a particular operation that is specified by a particular configuration data set for the particular configurable circuit. While the IC operates and a first set of configurable circuits performs a first set of operations, configuration data is loaded from the outside of the IC for configuring a second set of configurable circuits. In some embodiments, the configurable IC includes a configuration network for rapid loading configuration data in the IC from outside of the IC. In some of these embodiments, the configuration network is a pipelined network.
    Type: Application
    Filed: April 25, 2014
    Publication date: October 30, 2014
    Applicant: Tabula, Inc.
    Inventors: Brad Hutchings, Jason Redgrave, Teju Khubchandani, Herman Schmit, Steven Teig
  • Patent number: 8760194
    Abstract: Some embodiments of the invention provide a configurable integrated circuit (IC) that has several configurable circuits for configurably performing different operations. During the operation of the IC, each particular configurable circuit performs a particular operation that is specified by a particular configuration data set for the particular configurable circuit. While the IC operates and a first set of configurable circuits performs a first set of operations, configuration data is loaded from the outside of the IC for configuring a second set of configurable circuits. In some embodiments, the configurable IC includes a configuration network for rapid loading configuration data in the IC from outside of the IC. In some of these embodiments, the configuration network is a pipelined network.
    Type: Grant
    Filed: October 25, 2011
    Date of Patent: June 24, 2014
    Assignee: Tabula, Inc.
    Inventors: Brad Hutchings, Jason Redgrave, Teju Khubehandani, Herman Schmit, Steven Teig
  • Patent number: 8598909
    Abstract: Some embodiments provide a configurable integrated circuit (IC) comprising multiple deskew circuits for delaying data passage. Each of the deskew circuits comprises a stepwise delay circuit with multiple outputs and an input selection circuit with multiple inputs. Multiple outputs connect to multiple inputs. In some embodiments the configurable IC is a subcycle reconfigurable IC. In some such embodiments each of the deskew circuits further includes a space-time load control circuit for commanding the stepwise delay circuit to load during a selected subcycle. In some embodiments the multiple deskew circuits send data to a trigger circuit. In some such embodiments the trigger circuit triggers a trace buffer to stop recording a data stream. In some such embodiments the trigger circuit triggers the trace buffer to stop after a programmable delay.
    Type: Grant
    Filed: February 6, 2012
    Date of Patent: December 3, 2013
    Assignee: Tabula, Inc.
    Inventor: Brad Hutchings
  • Patent number: 8525548
    Abstract: Some embodiments provide an integrated circuit (‘IC’). The IC includes multiple configurable circuits that configurably perform operations of a user design based on configuration data. The IC also includes a configurable trigger circuit that receives a set of configuration data that specifies an operational event. The configurable trigger circuit also determines whether the operational event has occurred during implementation of the user design of the IC. Additionally, the operational trigger event outputs a trigger signal upon determining that the operational trigger event has occurred.
    Type: Grant
    Filed: December 29, 2008
    Date of Patent: September 3, 2013
    Assignee: Tabula, Inc.
    Inventors: Brad Hutchings, Jason Redgrave, Dai Huang, Steven Teig
  • Patent number: 8479069
    Abstract: Some embodiments provide an integrated circuit (“IC”) with a primary circuit structure. The primary circuit structure is for performing multiple operations that implement a user design. The primary circuit structure includes multiple circuits. The IC also includes a secondary monitoring structure for monitoring multiple operations. The secondary monitoring structure includes a network communicatively coupled to multiple circuits of the primary circuit structure. The secondary monitoring circuit structure is for analyzing the monitored operations and reporting on the analysis to a circuit outside of the IC.
    Type: Grant
    Filed: March 19, 2010
    Date of Patent: July 2, 2013
    Assignee: Tabula, Inc.
    Inventors: Marc Miller, Steven Teig, Brad Hutchings, Danny Thom
  • Patent number: 8433891
    Abstract: Some embodiments of the invention provide a configuration/debug network for configuring and debugging a configurable integrated circuit (IC). The configurable IC in some embodiments includes configurable resources (e.g., configurable logic resources, routing resources, memory resources, etc.) that can be grouped in conceptual configurable tiles that are arranged in several rows and columns. Some embodiments allow tiles to be individually addressed, globally addressed (i.e., all addressed together), or addressed based on their tile types. The configurable IC includes numerous user-design state elements (“UDS elements”) in some embodiments. In some embodiments, the configuration/debug network has a streaming mode that can direct various circuits in one or more configurable tiles to stream out their data during the operation of the configurable IC.
    Type: Grant
    Filed: August 27, 2010
    Date of Patent: April 30, 2013
    Assignee: Tabula, Inc.
    Inventors: Jason Redgrave, Brad Hutchings, Steven Teig, Herman Schmit, Teju Khubchandani
  • Patent number: 8429579
    Abstract: Some embodiments provide a method of monitoring the implementation of a user design in a configurable integrated circuit (IC). The method receives a user design for an IC and optimizes the user design to produce a second IC design. The optimization results in the elimination of circuit element(s). The method defines the second IC design for the configurable IC and generates output data for the eliminated circuit element(s) to allow for monitoring the user design.
    Type: Grant
    Filed: November 7, 2011
    Date of Patent: April 23, 2013
    Assignee: Tabula, Inc.
    Inventors: Brad Hutchings, Andrew Caldwell, Steven Teig
  • Patent number: 8412990
    Abstract: Some embodiments provide a method of dynamically tracking data values in a configurable integrated circuit (IC). The method, during a run time of the configurable IC, receives a request for a data value and dynamically configures the configurable IC to monitor the data value. In some embodiments, the method, in dynamically configuring the configurable IC, dynamically configures a debug network of the configurable IC. In some such embodiments, the method, in dynamically configuring the configurable IC, further dynamically configures a set of configurable routing circuits of the configurable IC. In some embodiments the configuration is performed while the IC is implementing a user design circuit.
    Type: Grant
    Filed: June 27, 2007
    Date of Patent: April 2, 2013
    Assignee: Tabula, Inc.
    Inventors: Brad Hutchings, Steven Teig
  • Publication number: 20130031316
    Abstract: Some embodiments provide for a method of mapping a user design to a configurable integrated circuit (IC). The method is for a configurable IC that implements a user design with an associated user design clock cycle. The IC operates on a sub-cycle clock that has multiple sub-cycle periods within a user period of the user design clock cycle. The method identifies multiple port accesses to a first multi-port memory defined in the user design. The accesses are in a single user design clock cycle. The method maps the multiple port accesses to the first multi-port memory to multiple physical-port memory accesses to a second physical-port memory in the configurable IC during multiple sub-cycles associated with a single user design clock cycle.
    Type: Application
    Filed: June 29, 2012
    Publication date: January 31, 2013
    Inventors: Herman Schmit, Steven Teig, Brad Hutchings