Patents by Inventor Brad L. Hawthorne

Brad L. Hawthorne has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Power semiconductor package with bottom surface protrusions
    Patent number: 8796560
    Abstract: A package includes a body that encapsulates a semiconductor die, the body having a first pair of opposing lateral sides, a second pair of opposing lateral sides, a top, and a bottom. The bottom has a primary surface and a plurality of protrusions that extend outward from the primary surface. When the package is mounted to a printed circuit board (PCB) the protrusions contact the PCB and the primary surface is disposed a first distance away from the PCB. The package further includes a plurality of leads that extend outward from the first pair of opposing lateral sides.
    Type: Grant
    Filed: June 25, 2012
    Date of Patent: August 5, 2014
    Assignee: Power Integrations, Inc.
    Inventors: Balu Balakrishnan, Brad L. Hawthorne, Stephan Bäurle
  • Package for a power semiconductor device
    Patent number: 8487417
    Abstract: A package for a semiconductor die includes a die attach pad that provides an attachment surface area for the semiconductor die, and tie bars connected to the die attach pad. The die attach pad is disposed in a first general plane and the tie bars are disposed in a second general plane offset with respect to the first general plane. A molding compound encapsulates the semiconductor die in a form having first, second, third and fourth lateral sides, a top and a bottom. The tie bars are exposed substantially coincident with at least one of the lateral sides. The form includes a discontinuity that extends along the at least one of the lateral sides, the discontinuity increasing a creepage distance measured from the tie bars to the bottom of the package.
    Type: Grant
    Filed: December 10, 2010
    Date of Patent: July 16, 2013
    Assignee: Power Integrations, Inc.
    Inventors: Balu Balakrishnan, Brad L. Hawthorne, Stefan Bäurle
  • Power Semiconductor Package With Bottom Surface Protrusions
    Publication number: 20120273944
    Abstract: A package includes a body that encapsulates a semiconductor die, the body having a first pair of opposing lateral sides, a second pair of opposing lateral sides, a top, and a bottom. The bottom has a primary surface and a plurality of protrusions that extend outward from the primary surface. When the package is mounted to a printed circuit board (PCB) the protrusions contact the PCB and the primary surface is disposed a first distance away from the PCB. The package further includes a plurality of leads that extend outward from the first pair of opposing lateral sides.
    Type: Application
    Filed: June 25, 2012
    Publication date: November 1, 2012
    Applicant: POWER INTEGRATIONS, INC.
    Inventors: Balu Balakrishnan, Brad L. Hawthorne, Stefan Bäurle
  • Power semiconductor package with bottom surface protrusions
    Patent number: 8207455
    Abstract: A package includes a body that encapsulates a semiconductor die, the body having a first pair of opposing lateral sides, a second pair of opposing lateral sides, a top, and a bottom. The bottom has a primary surface and a plurality of protrusions that extend outward from the primary surface. When the package is mounted to a printed circuit board (PCB) the protrusions contact the PCB and the primary surface is disposed a first distance away from the PCB. The package further includes a plurality of leads that extend outward from the first pair of opposing lateral sides.
    Type: Grant
    Filed: July 31, 2009
    Date of Patent: June 26, 2012
    Assignee: Power Integrations, Inc.
    Inventors: Balu Balakrishnan, Brad L. Hawthorne, Stefan Bäurle
  • Package for a power semiconductor device
    Publication number: 20110108963
    Abstract: A package for a semiconductor die includes a die attach pad that provides an attachment surface area for the semiconductor die, and tie bars connected to the die attach pad. The die attach pad is disposed in a first general plane and the tie bars are disposed in a second general plane offset with respect to the first general plane. A molding compound encapsulates the semiconductor die in a form having first, second, third and fourth lateral sides, a top and a bottom. The tie bars are exposed substantially coincident with at least one of the lateral sides. The form includes a discontinuity that extends along the at least one of the lateral sides, the discontinuity increasing a creepage distance measured from the tie bars to the bottom of the package.
    Type: Application
    Filed: December 10, 2010
    Publication date: May 12, 2011
    Applicant: Power Integrations, Inc.
    Inventors: Balu Balakrishnan, Brad L. Hawthorne, Stefan Bäurle
  • Power semiconductor package with bottom surface protrusions
    Publication number: 20110024185
    Abstract: A package includes a body that encapsulates a semiconductor die, the body having a first pair of opposing lateral sides, a second pair of opposing lateral sides, a top, and a bottom. The bottom has a primary surface and a plurality of protrusions that extend outward from the primary surface. When the package is mounted to a printed circuit board (PCB) the protrusions contact the PCB and the primary surface is disposed a first distance away from the PCB. The package further includes a plurality of leads that extend outward from the first pair of opposing lateral sides.
    Type: Application
    Filed: July 31, 2009
    Publication date: February 3, 2011
    Applicant: Power Integrations, Inc.
    Inventors: Balu Balakrishnan, Brad L. Hawthorne, Stefan Bäurle
  • Package for a power semiconductor device
    Patent number: 7875962
    Abstract: A package for a semiconductor die includes a die attach pad that provides an attachment surface area for the semiconductor die, and tie bars connected to the die attach pad. The die attach pad is disposed in a first general plane and the tie bars are disposed in a second general plane offset with respect to the first general plane. A molding compound encapsulates the semiconductor die in a form having first, second, third and fourth lateral sides, a top and a bottom. The tie bars are exposed substantially coincident with at least one of the lateral sides. The form includes a discontinuity that extends along the at least one of the lateral sides, the discontinuity increasing a creepage distance measured from the tie bars to the bottom of the package.
    Type: Grant
    Filed: October 15, 2007
    Date of Patent: January 25, 2011
    Assignee: Power Integrations, Inc.
    Inventors: Balu Balakrishnan, Brad L. Hawthorne, Stefan Bäurle
  • Package for a power semiconductor device
    Publication number: 20090096072
    Abstract: A package for a semiconductor die includes a die attach pad that provides an attachment surface area for the semiconductor die, and tie bars connected to the die attach pad. The die attach pad is disposed in a first general plane and the tie bars are disposed in a second general plane offset with respect to the first general plane. A molding compound encapsulates the semiconductor die in a form having first, second, third and fourth lateral sides, a top and a bottom. The tie bars are exposed substantially coincident with at least one of the lateral sides. The form includes a discontinuity that extends along the at least one of the lateral sides, the discontinuity increasing a creepage distance measured from the tie bars to the bottom of the package.
    Type: Application
    Filed: October 15, 2007
    Publication date: April 16, 2009
    Applicant: Power Integrations, Inc.
    Inventors: Balu Balakrishnan, Brad L. Hawthorne, Stefan Baurle