Abstract: A power throttling method and system for a memory controller in a computer system comprising a power supply module including a plurality of bulk power supplies (“BPSs”) are described. In one embodiment, each of the at BPSs provides to a power output monitor a status signal indicative of a status thereof. Responsive to receipt of the status signals, the power output monitor determines whether a bulk power supply capacity is below system power requirements. Responsive to a positive determination, the power output monitor drives a throttle control signal to the memory controller to a level indicative of an over-threshold state.

Abstract: A power throttling method and system for a memory controller in a computer system comprising a power supply module including a plurality of bulk power supplies (“BPSs”) are described. In one embodiment, each of the at BPSs provides to a power output monitor a status signal indicative of a status thereof. Responsive to receipt of the status signals, the power output monitor determines whether a bulk power supply capacity is below system power requirements. Responsive to a positive determination, the power output monitor drives a throttle control signal to the memory controller to a level indicative of an over-threshold state.

Abstract: Systems, methodologies, media, and other embodiments associated with detecting and responding to a degradation of a direct current provided to a frequency scalable processor are described. One exemplary frequency scalable processor includes a voltage regulating logic configured to request that a direct current having a reference voltage be provided to the processor. The example processor may also include a logic for detecting whether the voltage matches the reference voltage to within a desired tolerance and to selectively store processor state and/or data based on the detecting.

Abstract: A power throttling method and system for a memory controller in a computer system. One embodiment includes, responsive to a determination that a change in the state of a cover switch has occurred that will result in an increase in an operating temperature of at least one memory device during normal operation, driving a throttle control signal to the memory controller to a level indicative of an over-threshold state.