Patents by Inventor Brendan P. Mullaly

Brendan P. Mullaly has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7716512
    Abstract: Disclosed is a method of validating the contents of a real-time clock in a digital circuit. A plurality of memory elements create a first random signature value when power is newly applied to a circuit. The plurality of memory elements maintain the first random signature value while power to the circuit is maintained. The first random signature value is stored as a reference value such that the reference value is not altered by a power interruption. When power to the circuit is lost and then regained, a second random signature value is created. The second random signature value likely will no longer match the reference value because both the reference value and the second signature are random. When the reference value does not match the signature value, the real-time clock value is considered invalid. User input may be employed to correct the real-time clock value.
    Type: Grant
    Filed: January 10, 2005
    Date of Patent: May 11, 2010
    Assignee: Conexant Systems, Inc.
    Inventors: Michael J. Schaffstein, Brendan P. Mullaly, John J. Koger
  • Patent number: 7535606
    Abstract: A method of directly obtaining a Y value for a luminance/chrominance representation of a scanline of a color scanned image produced by a color contact image sensor device having a linear sensor array to collect reflected light, wherein said contact image sensor device comprises red, green and blue light sources and wherein an optimal on time for each of the light sources is calibrated, the method comprising the step of illuminating the scanline during a single pulse independently with the red, the green and the blue light sources and allowing the linear sensor array to accumulate the reflected light from all of the light sources.
    Type: Grant
    Filed: January 10, 2005
    Date of Patent: May 19, 2009
    Assignee: Conexant Systems, Inc.
    Inventors: Derek T. Walton, Brendan P. Mullaly
  • Patent number: 7447375
    Abstract: A method of compensating for image intensity variation in a scanline of a scanned image caused by variation in sensor integration time in a non-shuttered CCD image sensor comprising the steps of (a) determining for the scanline a multiplicative compensation factor, Kc (b) multiplying the sensed intensity of light received by sensor elements present in the CCD image sensor for the scanline by Kc to produce a compensated intensity value for the scanline and (c) employing the compensated intensity value in an image processing pipeline to produce the scanned image.
    Type: Grant
    Filed: January 10, 2005
    Date of Patent: November 4, 2008
    Assignee: Conexant Systems, Inc.
    Inventors: Derek T. Walton, Brendan P. Mullaly
  • Patent number: 7309117
    Abstract: A printing system comprising a set of nozzles for applying a color component, wherein each of the nozzles in the set is configured to apply a different effective color intensity; and a raster associated with the set of nozzles, the raster comprising a plurality of cells wherein each cell in the plurality of cells comprises at least one element which represents the effective color intensity to be applied to an area by the set of nozzles, wherein the number of elements in a cell is less than the range of different effective color intensities.
    Type: Grant
    Filed: January 10, 2005
    Date of Patent: December 18, 2007
    Assignee: Sigmatel, Inc.
    Inventors: Derek T. Walton, Brendan P. Mullaly
  • Patent number: 7180823
    Abstract: A delay lock loop for use in meeting SDRAM timing requirements, wherein a timing relationship between data generated by a computer chip and a clock in said DRAM is fully programmable, and wherein said delay lock loop is digitally implemented. The delay lock loop includes a first delay chain to measure a number of delay taps in a single clock cycle of the clock of the SDRAM and a second delay chain to delay the clock of the SDRAM. The second delay chain is matched to the first delay chain.
    Type: Grant
    Filed: January 10, 2005
    Date of Patent: February 20, 2007
    Assignee: Sigmatel, Inc.
    Inventors: Michael J. Schaffstein, Brendan P. Mullaly