Abstract: A user device determines whether a device connected to its headset jack is an audio accessory device. If the device connected to the headset jack is an audio accessory, the user device connects one or more pins of the headset jack to an audio codec. If the device plugged into the headset jack is not an audio accessory device, the user device connects one or more pins of the headset jack to alternate circuitry. The user device then determines, through the alternate circuitry, an electrical operating parameter requirement of the accessory device, and provides, from the alternate circuitry, the required operating parameter to the accessory device through the headset jack. The alternate circuitry may include an adjustable voltage regulator and/or an adjustable current regulator and the required operating parameter may be one or more of a voltage supply and a current supply.

Abstract: A user device determines whether a device connected to its headset jack is an audio accessory device. If the device connected to the headset jack is an audio accessory, the user device connects one or more pins of the headset jack to an audio codec. If the device plugged into the headset jack is not an audio accessory device, the user device connects one or more pins of the headset jack to alternate circuitry. The user device then determines, through the alternate circuitry, an electrical operating parameter requirement of the accessory device, and provides, from the alternate circuitry, the required operating parameter to the accessory device through the headset jack. The alternate circuitry may include an adjustable voltage regulator and/or an adjustable current regulator and the required operating parameter may be one or more of a voltage supply and a current supply.

Abstract: An apparatus and method of generating a current pair Ip, Im where the ratio of the pair is exponentially related to a control signal, and where either Ip or Im is greater than or less than a minimum or maximum value includes a feedback correction circuit used to sense the value of Im or Ip. The correction circuit supplies a boost current Iboost when the sensed value of Ip or Im is less than or greater than the minimum or maximum value. Iboost is preferably maintained proportional to the difference of the desired value and Ip or Im.

Abstract: A method and apparatus for adaptively correcting D.C. offset errors imposed upon signals in a communication device. The present invention includes a feedback loop correction circuit and method for measuring and reducing D.C. offset errors imposed upon analog transmission signals by transmit digital-to-analog converters (DACs) and associated analog reconstruction filters. A digital feedback loop is used to remove the D.C. offset errors from the analog transmission signals prior to transmission. In the preferred embodiment, the digital feedback loop includes a pair of analog-to-digital converters, a digital D.C. offset correction circuit, and a pair of adders. The transmission signals are digitized, filtered, and digitally processed by the correction circuit to generate offset correction signals that are equal to the undesired D.C. offset error present in the transmission signals. The correction signals are added to the digital input baseband signals thereby removing the undesirable D.C.

Abstract: A method and apparatus for adaptively correcting D.C. offset errors imposed upon signals in a communication device. The present invention includes a feedback loop correction circuit and method for measuring and reducing D.C. offset errors imposed upon analog transmission signals by transmit digital-to-analog converters (DACs) and associated analog reconstruction filters. A digital feedback loop is used to remove the D.C. offset errors from the analog transmission signals prior to transmission. In the preferred embodiment, the digital feedback loop includes a pair of analog-to-digital converters, a digital D.C. offset correction circuit, and a pair of adders. The transmission signals are digitized, filtered, and digitally processed by the correction circuit to generate offset correction signals that are equal to the undesired D.C. offset error present in the transmission signals. The correction signals are added to the digital input baseband signals thereby removing the undesirable D.C.