Abstract: A circuit board for a high speed communication jack including a rigid circuit board in the housing having a substrate, a plurality of vias extending through the substrate with each via being configured to accommodate a pin on the housing, a plurality of traces on a middle layer in the substrate, with each trace extending from a corresponding one of the plurality of vias, a first shielding layer on a first side of the middle layer in the substrate, a second shielding layer on a second side of the middle layer in the substrate, and a third shielding layer adjacent to the second shielding layer.

Abstract: A circuit board for a high speed communication jack including a rigid circuit board in the housing having a substrate, a plurality of vias extending through the substrate with each via being configured to accommodate a pin on the housing, a plurality of traces on a middle layer in the substrate, with each trace extending from a corresponding one of the plurality of vias, a first shielding layer on a first side of the middle layer in the substrate, a second shielding layer on a second side of the middle layer in the substrate, and a third shielding layer adjacent to the second shielding layer.

Abstract: A circuit board for a high speed communication jack including a rigid circuit board in the housing having a substrate, a plurality of vias extending through the substrate with each via being configured to accommodate a pin on the housing, a plurality of traces on a middle layer in the substrate, with each trace extending from a corresponding one of the plurality of vias, a first shielding layer on a first side of the middle layer in the substrate, a second shielding layer on a second side of the middle layer in the substrate, and a third shielding layer adjacent to the second shielding layer.

Abstract: A circuit board for a high speed communication jack including a rigid circuit board in the housing having a substrate, a plurality of vias extending through the substrate with each via being configured to accommodate a pin on the housing, a plurality of traces on a middle layer in the substrate, with each trace extending from a corresponding one of the plurality of vias, a first shielding layer on a first side of the middle layer in the substrate, a second shielding layer on a second side of the middle layer in the substrate, and a third shielding layer adjacent to the second shielding layer.

Abstract: A circuit board for a high speed communication jack including a rigid circuit board in the housing having a substrate, a plurality of vias extending through the substrate with each via being configured to accommodate a pin on the housing, a plurality of traces on a middle layer in the substrate, with each trace extending from a corresponding one of the plurality of vias, a first shielding layer on a first side of the middle layer in the substrate, a second shielding layer on a second side of the middle layer in the substrate, and a third shielding layer adjacent to the second shielding layer.

Abstract: A circuit board for a high speed communication jack including a rigid circuit board in the housing having a substrate, a plurality of vias extending through the substrate with each via being configured to accommodate a pin on the housing, a plurality of traces on a middle layer in the substrate, with each trace extending from a corresponding one of the plurality of vias, a first shielding layer on a first side of the middle layer in the substrate, a second shielding layer on a second side of the middle layer in the substrate, and a third shielding layer adjacent to the second shielding layer.

Abstract: A testing unit including a substrate, a plurality of vias located in the substrate, a plurality of pin traces having a height and a width and each extending from a respective via towards an edge of the substrate and terminating at an end point, a plurality of termination points adjacent to the end points of the pin traces, a plurality of end traces having a height and a width with each end trace extending from an end point of a respective pin trace towards to a corresponding termination point near to the pin trace, a plurality of traces extending from the end of a respective end point or termination point to the edge of the substrate.

Abstract: A testing unit including a substrate, a plurality of vias located in the substrate, a plurality of pin traces having a height and a width and each extending from a respective via towards an edge of the substrate, a plurality of end traces having a height and a width with each end trace extending from an end of a respective pin trace towards the edge of the substrate, a plurality of branch traces having a height and a width and each extending from a side of a respective pin trace, a plurality of traces extending from the end of a respective end trace, branch trace or pin trace to the edge of the substrate.

Abstract: A high speed communication jack including a housing including a port for accepting a plug, the port including a plurality of pins each connected to a corresponding signal line in the plug, a shielding case surrounding the housing, a circuit board in the housing having a substrate, a plurality of first vias extending through the substrate with each first via being configured to accommodate a pin on the housing, a plurality of second vias extending through the substrate with each second via being configured to accommodate a pin on the housing, a first set of traces on a top layer of the substrate that connects at least one first via with at least one corresponding second via; and a second set of traces on a side of the substrate opposite the top layer that connects at least one first via with at least one second via.

Abstract: A high speed communication jack including a housing including a port for accepting a plug, the port including a plurality of pins each connected to a corresponding signal line in the plug, a shielding case surrounding the housing, a circuit board in the housing having a substrate, a plurality of first vias extending through the substrate with each first via being configured to accommodate a pin on the housing, a plurality of second vias extending through the substrate with each second via being configured to accommodate a pin on the housing, a first set of traces on a top layer of the substrate that connects at least one first via with at least one corresponding second via; and a second set of traces on a side of the substrate opposite the top layer that connects at least one first via with at least one second via.

Abstract: A method of manufacturing a high speed jack, the method including the steps of forming a housing including a port for accepting a plug, the port including a plurality of pins each connected to a corresponding signal line in the plug, forming a shielding case surrounding the housing, forming a top layer of a substrate, a first shielding layer on a first side of the top layer in the substrate, a second shielding layer adjacent the first shielding layer in the substrate, and forming a bottom layer adjacent to the second shielding layer, forming a plurality of first vias extending through the substrate with each first via being configured to accommodate a pin on the housing, forming a plurality of second vias extending through the substrate with each second via being configured to accommodate a pin on the housing.

Abstract: A circuit board for a high speed communication jack including a rigid circuit board in the housing having a substrate, a plurality of vias extending through the substrate with each via being configured to accommodate a pin on the housing, a plurality of traces on a middle layer in the substrate, with each trace extending from a corresponding one of the plurality of vias, a first shielding layer on a first side of the middle layer in the substrate, a second shielding layer on a second side of the middle layer in the substrate, and a third shielding layer adjacent to the second shielding layer.

Abstract: A method of manufacturing a high speed jack, the method including the steps of forming a housing including a port for accepting a plug, the port including a plurality of pins each connected to a corresponding signal line in the plug, forming a shielding case surrounding the housing, forming a top layer of a substrate, a first shielding layer on a first side of the top layer in the substrate, a second shielding layer adjacent the first shielding layer in the substrate, and forming a bottom layer adjacent to the second shielding layer, forming a plurality of first vias extending through the substrate with each first via being configured to accommodate a pin on the housing, forming a plurality of second vias extending through the substrate with each second via being configured to accommodate a pin on the housing.

Abstract: A high speed communication jack including a housing including a port for accepting a plug, the port including a plurality of pins each connected to a corresponding signal line in the plug and a shielding case surrounding the housing. A flexible circuit board between the shielding case and the housing having a substrate, a plurality of vias extending through the substrate with each via being configured to accommodate a pin on the housing, a plurality of traces on a first side of the substrate, with each trace extending from a corresponding one of the plurality of vias, and a shielding plane on a second side of the substrate opposite the first side of the substrate.

Abstract: A high speed communication jack including a housing including a port for accepting a plug, the port including a plurality of pins each connected to a corresponding signal line in the plug and a shielding case surrounding the housing. A flexible circuit board between the shielding case and the housing having a substrate, a plurality of vias extending through the substrate with each via being configured to accommodate a pin on the housing, a plurality of traces on a first side of the substrate, with each trace extending from a corresponding one of the plurality of vias, and a shielding plane on a second side of the substrate opposite the first side of the substrate.

Abstract: A high speed communication jack including a housing including a port for accepting a plug, the port including a plurality of pins each connected to a corresponding signal line in the plug and a shielding case surrounding the housing. A flexible circuit board between the shielding case and the housing having a substrate, a plurality of vias extending through the substrate with each via being configured to accommodate a pin on the housing, a plurality of traces on a first side of the substrate, with each trace extending from a corresponding one of the plurality of vias, and a shielding plane on a second side of the substrate opposite the first side of the substrate.

Abstract: A testing unit including a substrate, a plurality of vias located in the substrate, a plurality of pin traces having a height and a width and each extending from a respective via towards an edge of the substrate and terminating at an end point, a plurality of termination points adjacent to the end points of the pin traces, a plurality of end traces having a height and a width with each end trace extending from an end point of a respective pin trace towards to a corresponding termination point near to the pin trace, a plurality of traces extending from the end of a respective end point or termination point to the edge of the substrate, where the end points of each pin trace are adjacent to each other and the termination points are adjacent to one another such that the pair of adjacent end traces and the pair of adjacent termination points are each adjacent to different traces.

Abstract: A testing unit including a substrate, a plurality of vias located in the substrate, a plurality of pin traces having a height and a width and each extending from a respective via towards an edge of the substrate, a plurality of end traces having a height and a width with each end trace extending from an end of a respective pin trace towards the edge of the substrate, a plurality of branch traces having a height and a width and each extending from a side of a respective pin trace, a plurality of traces extending from the end of a respective end trace, branch trace or pin trace to the edge of the substrate, where each end trace is adjacent to a respective branch trace, each end trace is adjacent to a respective branch trace on one side and a pin trace on the opposite side, and each pin trace is adjacent to another pin trace on one side.