Abstract: Systems and methods are disclosed for manufacturing a CMOS-MEMS device. A partial protective layer is deposited on a top surface of a layered to cover a logic region. A first partial etch is performed from the bottom side of the layered structure to form a first gap below a MEMS membrane within a MEMS region of the layered structure. A second partial etch is performed from the top side of the layered structure to remove a portion of a sacrificial layer between the MEMS membrane and a MEMS backplate within the MEMS region. The second partial etch releases the MEMS membrane so that it can move in response to pressures. The deposited partial protective layer prevents the second partial etch from etching a portion of the sacrificial layer positioned within the logic region of the layered structure and also prevents the second partial etch from damaging the CMOS logic component.

Abstract: Systems and methods are disclosed for manufacturing a CMOS-MEMS device. A partial protective layer is deposited on a top surface of a layered to cover a logic region. A first partial etch is performed from the bottom side of the layered structure to form a first gap below a MEMS membrane within a MEMS region of the layered structure. A second partial etch is performed from the top side of the layered structure to remove a portion of a sacrificial layer between the MEMS membrane and a MEMS backplate within the MEMS region. The second partial etch releases the MEMS membrane so that it can move in response to pressures. The deposited partial protective layer prevents the second partial etch from etching a portion of the sacrificial layer positioned within the logic region of the layered structure and also prevents the second partial etch from damaging the CMOS logic component.

Abstract: Systems and methods are disclosed for manufacturing a CMOS-MEMS device (100). A partial protective layer (401) is deposited on a top surface of a layered structure to cover a circuit region. A first partial etch is performed from the bottom side of the layered structure to form a first gap (501) below a MEMS membrane (207) within a MEMS region of the layered structure. A second partial etch is performed from the top side of the layered structure to remove a portion of a sacrificial layer between the MEMS membrane and a MEMS backplate (215) within the MEMS region. The second partial etch releases the MEMS membrane so that it can move in response to pressures. The deposited partial protective layer prevents the second partial etch from etching a portion of the sacrificial layer positioned within the circuit region of the layered structure and also prevents the second partial etch from damaging the CMOS circuit component (211).

Abstract: A micro electrical mechanical system (MEMS) device in one embodiment includes a substrate defining a back cavity, a membrane above the back cavity, a back plate above the membrane, and a first overtravel stop (OTS) positioned at least partially directly beneath the membrane and supported by the back plate.

Abstract: Systems and methods are disclosed for manufacturing a CMOS-MEMS device (100). A partial protective layer (401) is deposited on a top surface of a layered structure to cover a circuit region. A first partial etch is performed from the bottom side of the layered structure to form a first gap (501) below a MEMS membrane (207) within a MEMS region of the layered structure. A second partial etch is performed from the top side of the layered structure to remove a portion of a sacrificial layer between the MEMS membrane and a MEMS backplate (215) within the MEMS region. The second partial etch releases the MEMS membrane so that it can move in response to pressures. The deposited partial protective layer prevents the second partial etch from etching a portion of the sacrificial layer positioned within the circuit region of the layered structure and also prevents the second partial etch from damaging the CMOS circuit component (211).

Abstract: A micro electrical mechanical system (MEMS) device in one embodiment includes a substrate defining a back cavity, a membrane above the back cavity, a back plate above the membrane, and a first overtravel stop (OTS) positioned at least partially directly beneath the membrane and supported by the back plate.

Abstract: In a method for manufacturing a micromechanical membrane structure, a doped area is created in the front side of a silicon substrate, the depth of which doped area corresponds to the intended membrane thickness, and the lateral extent of which doped area covers at least the intended membrane surface area. In addition, in a DRIE (deep reactive ion etching) process applied to the back side of the silicon substrate, a cavity is created beneath the doped area, which DRIE process is aborted before the cavity reaches the doped area. The cavity is then deepened in a KOH etching process in which the doped substrate area functions as an etch stop, so that the doped substrate area remains as a basic membrane over the cavity.

Abstract: In a method for manufacturing a micromechanical membrane structure, a doped area is created in the front side of a silicon substrate, the depth of which doped area corresponds to the intended membrane thickness, and the lateral extent of which doped area covers at least the intended membrane surface area. In addition, in a DRIE (deep reactive ion etching) process applied to the back side of the silicon substrate, a cavity is created beneath the doped area, which DRIE process is aborted before the cavity reaches the doped area. The cavity is then deepened in a KOH etching process in which the doped substrate area functions as an etch stop, so that the doped substrate area remains as a basic membrane over the cavity.