Patents by Inventor Brian C. Kluge

Brian C. Kluge has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9218041
    Abstract: An apparatus includes logic to control heat generation in a device. The device to operate at least in one of a first state and a second state, wherein the device to consume more power in the first state than in the second state. The device to connect to a network at least for a portion of time while in the second state. The logic to select a plurality of thermal control solutions to decrease the generation of heat in the device in the second state, the selected thermal control solution to be performed while the device is in the second state to reduce the generated heat to below a predetermined level.
    Type: Grant
    Filed: December 28, 2012
    Date of Patent: December 22, 2015
    Assignee: Intel Corporation
    Inventors: Biswajit Sur, Thomas E. Walsh, Ajay G. Gupta, Brian C. Kluge, Kristoffer D. Fleming
  • Publication number: 20140189404
    Abstract: An apparatus includes logic to control heat generation in a device. The device to operate ate leas in one of a first state and a second state, wherein the device to consume more power in the first state than in the second state. The device to connect to a network at least for a portion of time while in the second state. The logic to select a plurality of thermal control solutions to decrease the generation of heat in the device in the second state, the selected thermal control solution to be performed while the device is in the second state to reduce the generated heat to below a predetermined level.
    Type: Application
    Filed: December 28, 2012
    Publication date: July 3, 2014
    Inventors: Biswajit SUR, Thomas E. Walsh, Ajay G. Gupta, Brian C. Kluge, Kristoffer D. Fleming
  • Patent number: 7350299
    Abstract: A method and a structure for reducing socket warpage in an embodiment by forming at least one groove in a socket housing contiguous to a surface mount region for an electrical device and securing a rigid bar in the groove.
    Type: Grant
    Filed: January 15, 2004
    Date of Patent: April 1, 2008
    Assignee: Intel Corporation
    Inventors: Tim A. Renfro, Brian C. Kluge, Jiteender P. Manik
  • Publication number: 20040147156
    Abstract: Socket warpage reduction apparatus and method.
    Type: Application
    Filed: January 15, 2004
    Publication date: July 29, 2004
    Applicant: Intel Corporation.
    Inventors: Tim A. Renfro, Brian C. Kluge, Jiteender P. Manik
  • Patent number: 6692280
    Abstract: Socket warpage reduction apparatus and method.
    Type: Grant
    Filed: September 28, 2001
    Date of Patent: February 17, 2004
    Assignee: Intel Corporation
    Inventors: Tim A. Renfro, Brian C. Kluge, Jiteender P. Manik
  • Patent number: 6616471
    Abstract: An advanced zero-insertion force (ZIF) socket for coupling an electronic package having a plurality of electrical pins onto a printed circuit board (PCB) of a computer system. Such a ZIF socket comprises a base having a plurality of receptacles adapted to receive electrical pins of an electronic package; a top plate slidably mounted on the base, having a plurality of pin insertion apertures adapted to permit insertion of the electrical pins of the electronic package; and a cam mechanism having an integrated lever which is operable for actuation in the same plane as the socket, for sliding the top plate over the base in a first direction to permit insertion of the electrical pins of the electronic package into respective apertures of the base, and for sliding the top plate over the base in a second direction opposite to the first direction to secure an electrical coupling of the electrical pins of the electronic package with the receptacles of the base.
    Type: Grant
    Filed: September 21, 2001
    Date of Patent: September 9, 2003
    Assignee: Intel Corporation
    Inventors: Tim A. Renfro, Brian C. Kluge, Jiteender P. Manik
  • Publication number: 20030064619
    Abstract: Socket warpage reduction apparatus and method.
    Type: Application
    Filed: September 28, 2001
    Publication date: April 3, 2003
    Inventors: Tim A. Renfro, Brian C. Kluge, Jiteender P. Manik
  • Publication number: 20030060074
    Abstract: An advanced zero-insertion force (ZIF) socket for coupling an electronic package having a plurality of electrical pins onto a printed circuit board (PCB) of a computer system. Such a ZIF socket comprises a base having a plurality of receptacles adapted to receive electrical pins of an electronic package; a top plate slidably mounted on the base, having a plurality of pin insertion apertures adapted to permit insertion of the electrical pins of the electronic package; and a cam mechanism having an integrated lever which is operable for actuation in the same plane as the socket, for sliding the top plate over the base in a first direction to permit insertion of the electrical pins of the electronic package into respective apertures of the base, and for sliding the top plate over the base in a second direction opposite to the first direction to secure an electrical coupling of the electrical pins of the electronic package with the receptacles of the base.
    Type: Application
    Filed: September 21, 2001
    Publication date: March 27, 2003
    Inventors: Tim A. Renfro, Brian C. Kluge, Jiteender P. Manik