Abstract: Method and apparatus are disclosed for use in a digital computer system having a system bus for interconnecting together various agents. A page mode type of memory access provides for the rapid transmission of a block of data across the bus. Blocked refresh circuitry is also employed which disables, if possible, the burst refresh of the memory until a data transfer is completed. A local processor upon an agent having a memory controlled in such manner is provided with a high priority signal line for overriding a current bus transfer for gaining access to the memory. During such a high priority access the blocked refresh circuitry operates in a manner somewhat similar to its operation during the sequential bus transfer, however fewer rows are refreshed during the burst refresh.