Patents by Inventor Brian J. Dolinar

Brian J. Dolinar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4797667
    Abstract: An electrode structure for an AC matrix-addressed TFEL panel includes top and bottom sets of scanning electrodes, each located in a respective half of the panel, and top and bottom sets of data electrodes extending at right angles to the scanning electrodes where each electrode in the top and bottom set extends for a distance slightly less than halfway across the panel to provide a split screen display. The scanning electrodes are driven by driver amplifiers that simultaneously energize complimentary pairs of the scanning electrodes in the top and bottom halves of the panel driving them in line-by-line fashion. The top and bottom sets of data electrodes are driven simultaneously by top and bottom sets of electrode drivers simultaneously with each scan of the data electrodes. In this way the top and bottom halves of the panel are scanned simultaneously, and the writing of one frame of data is faster. Also, the column electrodes are shorter and therefore require less energy and consume less power per frame.
    Type: Grant
    Filed: November 2, 1987
    Date of Patent: January 10, 1989
    Assignee: Planar Systems, Inc.
    Inventors: Brian J. Dolinar, Robert T. Flegal, Larry L. Lewis
  • Patent number: 4739320
    Abstract: A driving architecture for a matrix addressed TFEL display includes upper and lower data electrode arrays divided by a narrow gap and scanning electrodes arranged in complementary pairs one for each array of data electrodes. The data electrodes are charged at a rate which minimizes the power loss in the resistive component of the data electrode circuitry. The top and bottom data electrode arrays may be driven simultaneously, thereby decreasing the time needed to scan the panel, thus permitting more electrodes and larger screens. The split-screen array provides shorter data electrodes which take less time to charge, thus permitting use of energy-saving techniques which require a slower charging rate.
    Type: Grant
    Filed: April 30, 1985
    Date of Patent: April 19, 1988
    Assignee: Planar Systems, Inc.
    Inventors: Brian J. Dolinar, Robert T. Flegal, Larry L. Lewis
  • Patent number: 4691144
    Abstract: A TFEL panel includes orthogonally disposed sets of scanning and data electrodes. The scanning electrodes are strobed with a preconditioning voltage and data is provided to selected data electrodes simultaneously with the line by line strobing of the scanning electrodes. A refresh pulse is applied to the screen once per frame of data at times which vary from frame to frame. This may be accomplished either by varying the time of occurrence of the refresh pulse within each frame or by holding the time of occurrence of the refresh pulse constant and varying the strobing sequence of the scanning electrodes. This technique prevents certain portions of the screen from generating a latent image due to charge accumulation which would otherwise result from the timing asymmetry between the scanning of certain electrodes and the fixed timing of the refresh pulse.
    Type: Grant
    Filed: January 22, 1986
    Date of Patent: September 1, 1987
    Assignee: Planar Systems, Inc.
    Inventors: Christopher N. King, Brian J. Dolinar, William A. Barrow, Robert T. Flegal, Paul E. Gulick, Laurin G. Blacken