Patents by Inventor Brian J. Long

Brian J. Long has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11933453
    Abstract: A system includes at least one article of personal protective equipment, one or more industrial devices, an industrial controller device configured to output industrial controller data indicative of one or more attributes of the one or more industrial devices, and a computing device. The computing devices is configured to determine a set of one or more safety rules corresponding to a work environment at the first time and determine a change in an attribute of the one or more attributes of the one or more industrial devices. The computing device is further configured to identify an updated set of one or more worker safety rules corresponding to the work environment at the second time and determine whether the status of at least one article of personal protective equipment satisfies the updated set of one or more worker safety rules.
    Type: Grant
    Filed: September 19, 2019
    Date of Patent: March 19, 2024
    Assignee: 3M Innovative Properties Company
    Inventors: Brian J. Swift, Andrew W. Long, David R. Stein
  • Patent number: 11246217
    Abstract: Electronic device package technology is disclosed. In one example, a connector for coupling an electronics sub-assembly to an electronics assembly includes a connector body. The connector body has a sub-assembly interface and a circuit board interface. The connector body has at least one passive electronic component that is necessary for operating the sub-assembly, thereby maximizing available space for computational components on the sub-assembly. The connector body can comprise two separate bodies wherein the passives are contained between the bodies. At least one extension cable can electrically couple the connector to the sub-assembly. A method of making an electronics assembly, capable of receiving a sub-assembly via a connector, comprises providing an assembly circuit board having an electrically coupled connector with at least one passive electronic component.
    Type: Grant
    Filed: October 1, 2016
    Date of Patent: February 8, 2022
    Assignee: Intel Corporation
    Inventor: Brian J. Long
  • Patent number: 11147153
    Abstract: Aspects of the embodiments include an edge card and methods of making the same. The edge card can include a printed circuit board (PCB) comprising a first end and a second end, the first end comprising a plurality of metal contact fingers configured to interface with an edge connector, and the second end comprising a through-hole configured to mate with a post of a screw, the PCB further comprising an aperture proximate the second end of the PCB. The PCB can also include a thermal conduction element secured to the PCB, the thermal conduction element supporting an integrated circuit package, the integrated circuit package received by the aperture, wherein the thermal conduction element contacts the PCB proximate the through-hole and the thermal conduction element is configured to conduct heat from the integrated circuit towards the second portion of the printed circuit board.
    Type: Grant
    Filed: June 18, 2020
    Date of Patent: October 12, 2021
    Assignee: Intel Corporation
    Inventor: Brian J. Long
  • Patent number: 10937464
    Abstract: A case suitable for solid state memory is described that offers enhanced cooling. In one example, a memory case includes a base, a cover having a plurality of fins on a top of the cover, channels between the fins, defined by the fins, and a ramp extending from a front on the top of the cover to the channels, and an inner cavity defined by the base and the cover to house a solid state memory.
    Type: Grant
    Filed: March 17, 2017
    Date of Patent: March 2, 2021
    Assignee: Intel Corporation
    Inventor: Brian J. Long
  • Publication number: 20200323076
    Abstract: Aspects of the embodiments include an edge card and methods of making the same. The edge card can include a printed circuit board (PCB) comprising a first end and a second end, the first end comprising a plurality of metal contact fingers configured to interface with an edge connector, and the second end comprising a through-hole configured to mate with a post of a screw, the PCB further comprising an aperture proximate the second end of the PCB. The PCB can also include a thermal conduction element secured to the PCB, the thermal conduction element supporting an integrated circuit package, the integrated circuit package received by the aperture, wherein the thermal conduction element contacts the PCB proximate the through-hole and the thermal conduction element is configured to conduct heat from the integrated circuit towards the second portion of the printed circuit board.
    Type: Application
    Filed: June 18, 2020
    Publication date: October 8, 2020
    Applicant: Intel Corporation
    Inventor: Brian J. Long
  • Patent number: 10729000
    Abstract: Aspects of the embodiments include an edge card and methods of making the same. The edge card can include a printed circuit board (PCB) comprising a first end and a second end, the first end comprising a plurality of metal contact fingers configured to interface with an edge connector, and the second end comprising a through-hole configured to mate with a post of a screw, the PCB further comprising an aperture proximate the second end of the PCB. The PCB can also include a thermal conduction element secured to the PCB, the thermal conduction element supporting an integrated circuit package, the integrated circuit package received by the aperture, wherein the thermal conduction element contacts the PCB proximate the through-hole and the thermal conduction element is configured to conduct heat from the integrated circuit towards the second portion of the printed circuit board.
    Type: Grant
    Filed: September 28, 2016
    Date of Patent: July 28, 2020
    Assignee: Intel Corporation
    Inventor: Brian J. Long
  • Patent number: 10681817
    Abstract: Aspects of the disclosure are directed to an edge card that includes a printed circuit board having a top side and a bottom side. The top side of the printed circuit board can include one or more top-side circuit components, and a plurality of top-side metal contact fingers, at least some of the top-side metal contact fingers electrically connected to at least one of the one or more circuit components. The bottom side of the printed circuit board can include one or more bottom-side circuit components. The bottom side of the printed circuit board can also include a substrate interposer having a top side and a bottom side. The top side of the substrate interposer can include one or more passive circuit components at least partially embedded in the substrate interposer, and one or more solder balls arranged around the one or more passive circuit components.
    Type: Grant
    Filed: September 27, 2016
    Date of Patent: June 9, 2020
    Assignee: Intel Corporation
    Inventor: Brian J. Long
  • Publication number: 20200174533
    Abstract: A case suitable for solid state memory is described that offers enhanced cooling. In one example, a memory case includes a base, a cover having a plurality of fins on a top of the cover, channels between the fins, defined by the fins, and a ramp extending from a front on the top of the cover to the channels, and an inner cavity defined by the base and the cover to house a solid state memory.
    Type: Application
    Filed: March 17, 2017
    Publication date: June 4, 2020
    Inventor: Brian J. LONG
  • Patent number: 10490516
    Abstract: Techniques and mechanisms to facilitate connection with one or more integrated circuit (IC) dies of a packaged device. In an embodiment, the packaged device includes a first substrate coupled to a first side of a package, and a second substrate coupled to a second side of the package opposite the first side. Circuitry, coupled via the first substrate to one or more IC dies disposed in the package, includes a circuit structure disposed at a cantilever portion of the first substrate. The cantilever portion extends past one or both of an edge of the first side and an edge of the second side. In another embodiment, a hardware interface disposed on the second substrate enables coupling of the packaged device to another device.
    Type: Grant
    Filed: January 12, 2018
    Date of Patent: November 26, 2019
    Assignee: Intel Corporation
    Inventors: John G. Meyers, Bilal Khalaf, Sireesha Gogineni, Brian J. Long
  • Publication number: 20190215964
    Abstract: Aspects of the disclosure are directed to an edge card that includes a printed circuit board having a top side and a bottom side. The top side of the printed circuit board can include one or more top-side circuit components, and a plurality of top-side metal contact fingers, at least some of the top-side metal contact fingers electrically connected to at least one of the one or more circuit components. The bottom side of the printed circuit board can include one or more bottom-side circuit components. The bottom side of the printed circuit board can also include a substrate interposer having a top side and a bottom side. The top side of the substrate interposer can include one or more passive circuit components at least partially embedded in the substrate interposer, and one or more solder balls arranged around the one or more passive circuit components.
    Type: Application
    Filed: September 27, 2016
    Publication date: July 11, 2019
    Applicant: Intel Corporation
    Inventor: Brian J. Long
  • Publication number: 20190215960
    Abstract: Electronic device package technology is disclosed. In one example, a connector for coupling an electronics sub-assembly to an electronics assembly includes a connector body. The connector body has a sub-assembly interface and a circuit board interface. The connector body has at least one passive electronic component that is necessary for operating the sub-assembly, thereby maximizing available space for computational components on the sub-assembly. The connector body can comprise two separate bodies wherein the passives are contained between the bodies. At least one extension cable can electrically couple the connector to the sub-assembly. A method of making an electronics assembly, capable of receiving a sub-assembly via a connector, comprises providing an assembly circuit board having an electrically coupled connector with at least one passive electronic component.
    Type: Application
    Filed: October 1, 2016
    Publication date: July 11, 2019
    Applicant: Intel Corporation
    Inventor: Brian J. LONG
  • Publication number: 20190200446
    Abstract: Aspects of the embodiments include an edge card and methods of making the same. The edge card can include a printed circuit board (PCB) comprising a first end and a second end, the first end comprising a plurality of metal contact fingers configured to interface with an edge connector, and the second end comprising a through-hole configured to mate with a post of a screw, the PCB further comprising an aperture proximate the second end of the PCB. The PCB can also include a thermal conduction element secured to the PCB, the thermal conduction element supporting an integrated circuit package, the integrated circuit package received by the aperture, wherein the thermal conduction element contacts the PCB proximate the through-hole and the thermal conduction element is configured to conduct heat from the integrated circuit towards the second portion of the printed circuit board.
    Type: Application
    Filed: September 28, 2016
    Publication date: June 27, 2019
    Applicant: Intel Corporation
    Inventor: Brian J. Long
  • Publication number: 20180138133
    Abstract: Techniques and mechanisms to facilitate connection with one or more integrated circuit (IC) dies of a packaged device. In an embodiment, the packaged device includes a first substrate coupled to a first side of a package, and a second substrate coupled to a second side of the package opposite the first side. Circuitry, coupled via the first substrate to one or more IC dies disposed in the package, includes a circuit structure disposed at a cantilever portion of the first substrate. The cantilever portion extends past one or both of an edge of the first side and an edge of the second side. In another embodiment, a hardware interface disposed on the second substrate enables coupling of the packaged device to another device.
    Type: Application
    Filed: January 12, 2018
    Publication date: May 17, 2018
    Inventors: John G. Meyers, Bilal Khalaf, Sireesha Gogineni, Brian J. Long
  • Patent number: 9871007
    Abstract: Techniques and mechanisms to facilitate connection with one or more integrated circuit (IC) dies of a packaged device. In an embodiment, the packaged device includes a first substrate coupled to a first side of a package, and a second substrate coupled to a second side of the package opposite the first side. Circuitry, coupled via the first substrate to one or more IC dies disposed in the package, includes a circuit structure disposed at a cantilever portion of the first substrate. The cantilever portion extends past one or both of an edge of the first side and an edge of the second side. In another embodiment, a hardware interface disposed on the second substrate enables coupling of the packaged device to another device.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: January 16, 2018
    Assignee: Intel Corporation
    Inventors: John G. Meyers, Bilal Khalaf, Sireesha Gogineni, Brian J. Long
  • Patent number: 9867276
    Abstract: Electronic device and housing for such devices are described and claimed. In one example a housing comprises a first end cap dimensioned to fit within a first open end of the housing and comprising a first bracket having a first cam surface positioned to engage the second surface of the printed circuit board when the first end cap is inserted into the first open end of the housing. Inserting the first end cap into the first open end of the housing causes the first cam surface to urge the printed circuit board in a direction which compresses the first heat generating component against an interior surface of the housing.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: January 9, 2018
    Assignee: Intel Corporation
    Inventors: Paul J. Gwin, Brian J. Long
  • Publication number: 20170092602
    Abstract: Techniques and mechanisms to facilitate connection with one or more integrated circuit (IC) dies of a packaged device. In an embodiment, the packaged device includes a first substrate coupled to a first side of a package, and a second substrate coupled to a second side of the package opposite the first side. Circuitry, coupled via the first substrate to one or more IC dies disposed in the package, includes a circuit structure disposed at a cantilever portion of the first substrate. The cantilever portion extends past one or both of an edge of the first side and an edge of the second side. In another embodiment, a hardware interface disposed on the second substrate enables coupling of the packaged device to another device.
    Type: Application
    Filed: September 25, 2015
    Publication date: March 30, 2017
    Inventors: John G. Meyers, Bilal Khalaf, Sireesha Gogineni, Brian J. Long
  • Publication number: 20170094772
    Abstract: Electronic devices and housings for such devices are described and claimed.
    Type: Application
    Filed: September 25, 2015
    Publication date: March 30, 2017
    Applicant: Intel Corporation
    Inventors: Paul J. Gwin, Brian J. Long
  • Patent number: 8353176
    Abstract: In some embodiments, a cooling device may be mounted to a portion of a chassis of an electronic system, wherein the cooling device may be releasably and pivotably attached to the chassis in at least an open position to permit access to components within the electronic system and a closed position to permit installation of a cover on the chassis. Other embodiments are disclosed and claimed.
    Type: Grant
    Filed: December 31, 2009
    Date of Patent: January 15, 2013
    Assignee: Intel Corporation
    Inventors: Paul J. Gwin, Brian J. Long
  • Patent number: 7760500
    Abstract: In some embodiments, a cooling device may be mounted to a portion of a chassis of an electronic system, wherein the cooling device may be releasably and pivotably attached to the chassis in at least an open position to permit access to components within the electronic system and a closed position to permit installation of a cover on the chassis. Other embodiments are disclosed and claimed.
    Type: Grant
    Filed: March 12, 2008
    Date of Patent: July 20, 2010
    Assignee: Intel Corporation
    Inventors: Paul J. Gwin, Brian J. Long
  • Patent number: 7748229
    Abstract: In some embodiments, a cooling device may be mounted to a portion of a chassis of an electronic system, wherein the cooling device may be releasably and pivotably attached to the chassis in at least an open position to permit access to components within the electronic system and a closed position to permit installation of a cover on the chassis. Other embodiments are disclosed and claimed.
    Type: Grant
    Filed: March 12, 2008
    Date of Patent: July 6, 2010
    Assignee: Intel Corporation
    Inventors: Paul J. Gwin, Brian J. Long