Patents by Inventor Brian James Martin
Brian James Martin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9977723Abstract: Exemplary methods, apparatuses, and systems receive characteristics of a plurality of input/output (I/O) requests from a workload, including logical address distance values between I/O requests and data lengths of the plurality of I/O requests. Based upon the characteristics, a data length value representative of the data lengths of the plurality of I/O requests is determined and an access pattern of the plurality of I/O requests is determined. A notification that the first workload is suitable for a virtual storage area network environment is generated based upon the characteristics. The first workload is selected as suitable in response to determining the data length value for the data lengths of the plurality of I/O requests is less than a data length threshold and/or the access pattern of the plurality of I/O requests is more random than an access pattern threshold on the spectrum from random access to sequential access.Type: GrantFiled: November 26, 2014Date of Patent: May 22, 2018Assignee: VMware, Inc.Inventors: Tariq Magdon-Ismail, Duy Nguyen, Brian James Martin
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Patent number: 9753833Abstract: Exemplary methods, apparatuses, and systems receive a first input/output (I/O) trace including storage addresses that were subject to a plurality of I/O requests from a first workload during a first period of time. The first I/O trace is run through a cache simulation using a plurality of simulated cache sizes. A first state of the cache simulation is stored upon completing the first I/O trace simulation. The first I/O trace is deleted in response to storing the first state. A second I/O trace including storage addresses that were subject to a plurality of I/O requests from the first workload during a second period of time is received. A cumulative miss ratio curve for the first workload is generated by loading the stored first state as a starting point for simulating the second I/O trace and running the second I/O trace through the cache simulation.Type: GrantFiled: November 26, 2014Date of Patent: September 5, 2017Assignee: VMware, Inc.Inventors: Tariq Magdon-Ismail, Duy Nguyen, Brian James Martin
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Patent number: 9558126Abstract: Exemplary methods, apparatuses, and systems receive a first input/output (I/O) trace from a first workload and run the first I/O trace through a cache simulation to determine a first miss ratio curve (MRC) for the first workload. A second I/O trace from the first workload is received and run through the cache simulation to determine a second MRC for the first workload. First and second cache sizes corresponding to a target miss rate for the first workload are determined using the first and second MRCs. A fingerprint of each of the first and I/O traces is generated. The first cache size, the second cache size, or a combination of the first and second cache sizes is selected as a cache size for the first workload based upon a comparison of the first and second fingerprints. A recommended cache size is generated based upon the selected cache size.Type: GrantFiled: November 26, 2014Date of Patent: January 31, 2017Assignee: VMware, Inc.Inventors: Tariq Magdon-Ismail, Duy Nguyen, Brian James Martin, Abha Jain
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Publication number: 20160150003Abstract: Exemplary methods, apparatuses, and systems receive characteristics of a plurality of input/output (I/O) requests from a workload, including logical address distance values between I/O requests and data lengths of the plurality of I/O requests. Based upon the characteristics, a data length value representative of the data lengths of the plurality of I/O requests is determined and an access pattern of the plurality of I/O requests is determined. A notification that the first workload is suitable for a virtual storage area network environment is generated based upon the characteristics. The first workload is selected as suitable in response to determining the data length value for the data lengths of the plurality of I/O requests is less than a data length threshold and/or the access pattern of the plurality of I/O requests is more random than an access pattern threshold on the spectrum from random access to sequential access.Type: ApplicationFiled: November 26, 2014Publication date: May 26, 2016Inventors: Tariq Magdon-Ismail, Duy Nguyen, Brian James Martin
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Publication number: 20160147631Abstract: Exemplary methods, apparatuses, and systems receive a first input/output (I/O) trace including storage addresses that were subject to a plurality of I/O requests from a first workload during a first period of time. The first I/O trace is run through a cache simulation using a plurality of simulated cache sizes. A first state of the cache simulation is stored upon completing the first I/O trace simulation. The first I/O trace is deleted in response to storing the first state. A second I/O trace including storage addresses that were subject to a plurality of I/O requests from the first workload during a second period of time is received. A cumulative miss ratio curve for the first workload is generated by loading the stored first state as a starting point for simulating the second I/O trace and running the second I/O trace through the cache simulation.Type: ApplicationFiled: November 26, 2014Publication date: May 26, 2016Inventors: Tariq Magdon-Ismail, Duy Nguyen, Brian James Martin
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Publication number: 20160147665Abstract: Exemplary methods, apparatuses, and systems receive a first input/output (I/O) trace from a first workload and run the first I/O trace through a cache simulation to determine a first miss ratio curve (MRC) for the first workload. A second I/O trace from the first workload is received and run through the cache simulation to determine a second MRC for the first workload. First and second cache sizes corresponding to a target miss rate for the first workload are determined using the first and second MRCs. A fingerprint of each of the first and I/O traces is generated. The first cache size, the second cache size, or a combination of the first and second cache sizes is selected as a cache size for the first workload based upon a comparison of the first and second fingerprints. A recommended cache size is generated based upon the selected cache size.Type: ApplicationFiled: November 26, 2014Publication date: May 26, 2016Inventors: Tariq Magdon-Ismail, Duy Nguyen, Brian James Martin, Abha Jain
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Patent number: 7634567Abstract: Described are techniques for processing a data storage configuration request for an application A first user level of a plurality of user levels at which said data storage configuration request is made is determined. One or more rule sets defining mappings between different ones of said plurality of user levels are provided. Each of the different user levels is associated with a different level of abstraction with respect to processing performed in the data storage system for implementing the data storage configuration request. One of the rule sets is selected in accordance with the application, a data service requested in said data storage configuration request, and a user grouping including said plurality of user levels. The data storage configuration request is serviced using rules of the selected rule set.Type: GrantFiled: June 29, 2007Date of Patent: December 15, 2009Assignee: EMC CorporationInventors: Douglas A. Wood, Uday K. Gupta, Stephen J. Todd, Andreas L. Bauer, Mark A. Parenti, Joseph T. Frank, Thomas G. Magorka, David C. Butchart, Brian James Martin
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Patent number: 7523231Abstract: Described are techniques for processing a data storage configuration request for an application A first user level of a plurality of user levels at which said data storage configuration request is made is determined. One or more rule sets defining mappings between different ones of said plurality of user levels are provided. Each of the different user levels is associated with a different level of abstraction with respect to processing performed in the data storage system for implementing the data storage configuration request. One of the rule sets is selected in accordance with the application, a data service requested in said data storage configuration request, and a user grouping including said plurality of user levels. The data storage configuration request is serviced using rules of the selected rule set.Type: GrantFiled: June 29, 2007Date of Patent: April 21, 2009Assignee: EMC CorporationInventors: Uday K. Gupta, Andreas L. Bauer, Stephen J. Todd, Douglas A. Wood, Mark A. Parenti, Joseph T. Frank, Thomas Magorka, David C. Butchart, Brian James Martin, Todd R. Brune, Matthew T. Brooks, Giridhar G. Basava
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Patent number: 7080375Abstract: Featured is a method for reducing the contention of the highly contended global lock(s) of an operating system, hereinafter dispatcher lock(s) that protects all dispatching structures. Such a method reduces the need for acquiring the global lock for many event notification tasks by introducing local locks for event notifications that occur frequently among well defined, or consistent dispatcher objects. For these frequently occurring event notifications a subset of the dispatching structure is locked thereby providing mutual exclusivity for the subset and allowing concurrent dispatching for one or more of other data structure subsets. The method also includes acquiring one or more local locks where the level of protection of the data structure requires locking of a plurality or more of data structures to provide mutual exclusivity.Type: GrantFiled: December 30, 2000Date of Patent: July 18, 2006Assignee: EMC Corporation/Data GeneralInventor: Brian James Martin
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Patent number: 7065763Abstract: Featured is a method or process for reducing contention of a highly contended software lock(s) that is protecting multiple data items, where the software has a plurality of code paths accessing the data items. The method includes creating additional partition locks to protect subsets of the data items protected by the existing global lock. Such a method further includes acquiring all partition locks and the global lock, wherever a global lock would have been acquired to protect data. The method also includes identifying one or more heavily used code paths and determining which data items are touched by the identified one or more heavily used code paths. These data items are then moved into a partition, if they were not partitioned earlier. The locking requirements for each of the identified one or more heavily used code paths are optimized to match the reduced locking requirements because of the partitioned data items.Type: GrantFiled: September 29, 2000Date of Patent: June 20, 2006Assignee: EMC CorporationInventors: Brian James Martin, Michael Ryan
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Patent number: 7020669Abstract: Featured are methods for writing file systems write data operations to storage medium as well as system and program embodying such a methodology. According to one aspect, the method includes storing a file systems write data operation to a first temporary data store and mirroring the file systems write data operation in a second temporary data store. The method further includes deleting the mirrored file systems write data operation from the second temporary data store if it is successfully written from the first temporary data store to the storage medium and writing the mirrored file systems write data operation from the second temporary data store to the storage medium if it is not successfully written from the first temporary data store. In another aspect, the method includes storing the file systems write data operation in the first temporary data store of one server and mirroring it in the second temporary data store of another server.Type: GrantFiled: September 27, 2001Date of Patent: March 28, 2006Assignee: EMC CorporationInventors: Peter John McCann, Brian James Martin, Roy Clark
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Patent number: 6658522Abstract: Featured is a method for reducing overhead associated with system input output (I/O) operations in a computer system having a plurality of processors and a physical memory accessed and used by the plurality of processors. The physical memory being accessed can be a global physical memory such as that used with SMP types of architectures or distributed physical memory such as that used with CCNUMA types of architectures. Such a method includes creating a pinned virtual memory range database in which is stored virtual memory address information corresponding to pinned physical memory for each applications program being run on the computer system. Also featured is an operating system for execution with a multiprocessor computer system and a multiprocessor computer including such an operating system for execution therein.Type: GrantFiled: June 16, 2000Date of Patent: December 2, 2003Assignee: EMC CorporationInventors: Brian James Martin, Peter John McCann
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Publication number: 20030061240Abstract: Featured are methods for writing file systems write data operations to storage medium as well as system and program embodying such a methodology. According to one aspect, the method includes storing a file systems write data operation to a first temporary data store and mirroring the file systems write data operation in a second temporary data store. The method further includes deleting the mirrored file systems write data operation from the second temporary data store if it is successfully written from the first temporary data store to the storage medium and writing the mirrored file systems write data operation from the second temporary data store to the storage medium if it is not successfully written from the first temporary data store. In another aspect, the method includes storing the file systems write data operation in the first temporary data store of one server and mirroring it in the second temporary data store of another server.Type: ApplicationFiled: September 27, 2001Publication date: March 27, 2003Applicant: EMC CorporationInventors: Peter John McCann, Brian James Martin, Roy Clark
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Patent number: 6530002Abstract: An improved method and apparatus for providing access between the processors and the mass storage devices of a computer system wherein an interprocessor bus interconnects the processors and adapters are connected from the interprocessor bus for communication between the processors and the mass storage devices and the system includes binding utility for communicating with the processors and the adapters to generate pairings between the processors and the adapters. A switch is connected between the adapters and the mass storage devices for connecting each adapter to each mass storage device and a binding mapper operates with the binding utility at each binding of a processor/adapter pair to enumerate the mass storage devices with which a processor/adapter pair is to communicate and determines a mass storage identifier by which the processor identifies the mass storage device. An address mapper references the binding mapper to construct and store an address map having processor set for each mass storage device.Type: GrantFiled: August 1, 2001Date of Patent: March 4, 2003Inventors: Brian James Martin, George Garfield Peters, Michael Scott Ryan
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Publication number: 20020087736Abstract: Featured is a method for reducing the contention of the highly contended global lock(s) of an operating system, hereinafter dispatcher lock(s) that protects all dispatching structures. Such a method reduces the need for acquiring the global lock for many event notification tasks by introducing local locks for event notifications that occur frequently among well defined, or consistent dispatcher objects. For these frequently occurring event notifications a subset of the dispatching structure is locked thereby providing mutual exclusivity for the subset and allowing concurrent dispatching for one or more of other data structure subsets. The method also includes acquiring one or more local locks where the level of protection of the data structure requires locking of a plurality or more of data structures to provide mutual exclusivity.Type: ApplicationFiled: December 30, 2000Publication date: July 4, 2002Applicant: EMC CorporationInventor: Brian James Martin
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Patent number: 6295587Abstract: An improved method and apparatus for providing access between the processors and the mass storage devices of a computer system wherein an interprocessor bus interconnects the processors and adapters are connected from the interprocessor bus for communication between the processors and the mass storage devices and the system includes binding utility for communicating with the processors and the adapters to generate pairings between the processors and the adapters. A switch is connected between the adapters and the mass storage devices for connecting each adapter to each mass storage device and a binding mapper operates with the binding utility at each binding of a processor/adapter pair to enumerate the mass storage devices with which a processor/adapter pair is to communicate and determines a mass storage identifier by which the processor identifies the mass storage device. An address mapper references the binding mapper to construct and store an address map having processor set for each mass storage device.Type: GrantFiled: September 3, 1999Date of Patent: September 25, 2001Assignee: EMC CorporationInventors: Brian James Martin, George Garfield Peters, Michael Scott Ryan