Abstract: A circuit package includes a substrate formed using a plurality of layers, the substrate having a first surface and a second surface, at least some of the plurality of layers being electrically interconnected by a via; and at least one standard surface-mount capacitive element electrically coupled to at least one surface of the substrate, thereby allowing electrical and mechanical access to the first surface and the second surface, the at least one standard surface-mount capacitive element located to prevent the passage of a direct current (DC) signal through the circuit package.

Abstract: A method and system of imaging an object. First, movement information of the object is determined by using a navigation sensor array and a navigation engine. Based on the movement information, an imaging sensor strobe signal is selectively asserted to control an imaging sensor array. In response to an asserted imaging sensor strobe signal, the imaging sensor array captures sub-images of the object. The imaging sensor array has a plurality of pixels for imaging a portion of the object at one time. The plurality of sub-images are captured successively by the imaging sensor array as the object moves with respect to the imaging sensor array. Then, a composite image of the object is generated based on the captured sub-images.

Abstract: Sequential read-out method and system for reading out an array of photocells are disclosed. The array includes a plurality of photocells that are arranged in rows and columns. A sequential readout circuit is provided for reading out the values of each photocells in a sequential fashion. The sequential readout circuit processes one photocell at a time and can, for example, determine a difference between a final integration light value and a reset value for each photocell in a time sequential manner.

Abstract: A photocell system includes a current control circuit that provides an offset voltage. Each photocell in a photocell array includes an opto-electrical converter receives the offset voltage such that the opto-electrical converter establishes a DC operating point. In one embodiment, each photocell includes the current control circuit. In an alternate embodiment, a single current control circuit provides the offset voltage for the entire photocell array.

Abstract: A photocell system includes a current control circuit that provides an offset voltage. Each photocell in a photocell array includes an opto-electrical converter receives the offset voltage such that the opto-electrical converter establishes a DC operating point. In one embodiment, each photocell includes the current control circuit. In an alternate embodiment, a single current control circuit provides the offset voltage for the entire photocell array.

Abstract: A CMOS digital integrated circuit digitally captures an image, generates a result surface on which a minima resides, and compares the result surfaces. The correlation of the result surfaces represents a best fit image displacement between image frames.

Abstract: Sequential read-out method and system for reading out an array of photocells are disclosed. The array includes a plurality of photocells that are arranged in rows and columns. A sequential readout circuit is provided for reading out the values of each photocells in a sequential fashion. The sequential readout circuit processes one photocell at a time and can, for example, determine a difference between a final integration light value and a reset value for each photocell in a time sequential manner.

Abstract: A CMOS digital integrated circuit (IC) chip on which an image is captured, digitized, and then processed on-chip in substantially the digital domain. A preferred embodiment comprises imaging circuitry including a photo cell array for capturing an image and generating a representative analog signal, conversion circuitry including an n-bit successive approximation register (SAR) analog-to-digital converter for converting the analog signal to a corresponding digital signal, filter circuitry including a spatial filter for edge and contrast enhancement of the corresponding image, compression circuitry for reducing the digital signal storage needs, correlation circuitry for processing the digital signal to generate result surface on which a minima resides representing a best fit image displacement between the captured image and previous images, interpolation circuitry for mapping the result surface into x- and y-coordinates, and an interface with a device using the chip, such as a hand-held scanner.