Patents by Inventor Brian L. Vajda

Brian L. Vajda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220413865
    Abstract: Systems, methods, and apparatuses to support instructions for a hardware assisted heterogeneous instruction set architecture dispatcher are described.
    Type: Application
    Filed: June 25, 2021
    Publication date: December 29, 2022
    Inventors: BALAJI MASANAMUTHU CHINNATHURAI, KUNAL MEHTA, BRIAN L. VAJDA
  • Patent number: 9239801
    Abstract: An example processing system may comprise: a lower stack bound register configured to store a first memory address, the first memory address identifying a lower bound of a memory addressable via a stack segment; an upper stack bound register configured to store a second memory address, the second memory address identifying an upper bound of the memory addressable via the stack segment; and a stack bounds checking logic configured to detect unauthorized stack pivoting, by comparing a memory address being accessed via the stack segment with at least one of the first memory address and the second memory address.
    Type: Grant
    Filed: June 5, 2013
    Date of Patent: January 19, 2016
    Assignee: Intel Corporation
    Inventors: Baiju V. Patel, Xiaoning Li, H P. Anvin, Asit K. Mallick, Gilbert Neiger, James B. Crossland, Toby Opferman, Atul A. Khare, Jason W. Brandt, James S. Coke, Brian L. Vajda
  • Publication number: 20140365742
    Abstract: An example processing system may comprise: a lower stack bound register configured to store a first memory address, the first memory address identifying a lower bound of a memory addressable via a stack segment; an upper stack bound register configured to store a second memory address, the second memory address identifying an upper bound of the memory addressable via the stack segment; and a stack bounds checking logic configured to detect unauthorized stack pivoting, by comparing a memory address being accessed via the stack segment with at least one of the first memory address and the second memory address.
    Type: Application
    Filed: June 5, 2013
    Publication date: December 11, 2014
    Inventors: BAIJU V. PATEL, XIAONING LI, H P. ANVIN, ASIT K. MALLICK, GILBERT NEIGER, JAMES B. CROSSLAND, TOBY OPFERMAN, ATUL A. KHARE, JASON W. BRANDT, JAMES S. COKE, BRIAN L. VAJDA
  • Publication number: 20140344509
    Abstract: In some embodiments a permanent cache list of files not to be removed from a cache is determined in response to a user selection of an application to be added to the cache. The determination is made by adding a file to the cache list if the file is a static dependency of the application, or if a file has a high probability of being used in the future by the application. Other embodiments are described and claimed.
    Type: Application
    Filed: May 22, 2014
    Publication date: November 20, 2014
    Inventors: Louis A. Duran, Brian L. Vajda, Punit Modi
  • Publication number: 20080162821
    Abstract: In some embodiments a permanent cache list of files not to be removed from a cache is determined in response to a user selection of an application to be added to the cache. The determination is made by adding a file to the cache list if the file is a static dependency of the application, or if a file has a high probability of being used in the future by the application. Other embodiments are described and claimed.
    Type: Application
    Filed: December 27, 2006
    Publication date: July 3, 2008
    Inventors: Louis A. Duran, Brian L. Vajda, Punit Modi