Patents by Inventor Brian R. McFarlane
Brian R. McFarlane has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10649484Abstract: The present disclosure provides devices and techniques to dynamically change the operating frequency of an interface where components on the interface have non-common clocks. An interface component may be provided with a frequency negotiation component to negotiate a shift in an operating frequency with other component on an interface where the different components have non-common clocks.Type: GrantFiled: April 23, 2018Date of Patent: May 12, 2020Assignee: INTEL CORPORATIONInventors: Anoop Mukker, Eng Hun Ooi, Robert J. Royer, Jr., Brian R. McFarlane
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Publication number: 20190278503Abstract: A method is described. The method includes performing write operations on a plurality of NVRAM semiconductor chips of a memory module while tracking power budget headroom for performing the write operations and while monitoring current draw on a supply voltage rail that is coupled to the plurality of NVRAM semiconductor chips. The method further includes detecting the current draw has reached a threshold. The method further includes ceasing or diminishing the write operations in response to the detecting.Type: ApplicationFiled: May 29, 2019Publication date: September 12, 2019Inventors: Sowmiya JAYACHANDRAN, Andrew MORNING-SMITH, Brian R. MCFARLANE, William T. GLENNAN, Emily P. CHUNG
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Patent number: 10402565Abstract: A hardware platform includes a nonvolatile storage device that can store system firmware as well as code for the primary operating system for the hardware platform. The hardware platform includes a controller that determines the hardware platform lacks functional firmware to boot the primary operating system from the storage device. The controller accesses a firmware image from an external interface that interfaces a device external to the hardware platform, where the external device is a firmware image source. The controller provisions the firmware from the external device to the storage device and initiates a boot sequence from the provisioned firmware.Type: GrantFiled: January 30, 2017Date of Patent: September 3, 2019Assignee: Intel CorporationInventors: Nitin V. Sarangdhar, Robert J. Royer, Jr., Eng Hun Ooi, Brian R. McFarlane, Mukesh Kataria
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Patent number: 10345885Abstract: A method is described that includes choosing between one of two different ways to cause a memory device to enter a specific one of multiple lower power states that each comprise lower power consumption than a highest low power state. The method also includes asserting a first signal on a first signal line that is coupled to a power management controller of the memory device to indicate to the power management controller that a sideband channel of a memory bus that is coupled to the memory device is activated. The method also includes causing the memory device to enter the specific one of the multiple lower power states by also performing the chosen one of a) sending an in-band signal on said memory bus coupled with said asserting of said first signal, said in-band signal specifying the specific one of the multiple lower power states; or, b) sending a second signal on a second signal line that identifies the specific one of the multiple lower power states.Type: GrantFiled: September 27, 2016Date of Patent: July 9, 2019Assignee: Intel CorporationInventors: Brian R. McFarlane, Robert J. Royer, Anoop Mukker, Eng Hun Ooi, Ritesh B. Trivedi
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Publication number: 20180307263Abstract: The present disclosure provides devices and techniques to dynamically change the operating frequency of an interface where components on the interface have non-common clocks. An interface component may be provided with a frequency negotiation component to negotiate a shift in an operating frequency with other component on an interface where the different components have non-common clocks.Type: ApplicationFiled: April 23, 2018Publication date: October 25, 2018Applicant: INTEL CORPORATIONInventors: ANOOP MUKKER, ENG HUN OOI, ROBERT J. ROYER, JR., BRIAN R. MCFARLANE
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Patent number: 9952619Abstract: The present disclosure provides devices and techniques to dynamically change the operating frequency of an interface where components on the interface have non-common clocks. An interface component may be provided with a frequency negotiation component to negotiate a shift in an operating frequency with other component on an interface where the different components have non-common clocks.Type: GrantFiled: September 25, 2015Date of Patent: April 24, 2018Assignee: INTEL CORPORATIONInventors: Anoop Mukker, Eng Hun Ooi, Robert J. Royer, Jr., Brian R. McFarlane
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Publication number: 20180088658Abstract: A method is described that includes choosing between one of two different ways to cause a memory device to enter a specific one of multiple lower power states that each comprise lower power consumption than a highest low power state. The method also includes asserting a first signal on a first signal line that is coupled to a power management controller of the memory device to indicate to the power management controller that a sideband channel of a memory bus that is coupled to the memory device is activated. The method also includes causing the memory device to enter the specific one of the multiple lower power states by also performing the chosen one of a) sending an in-band signal on said memory bus coupled with said asserting of said first signal, said in-band signal specifying the specific one of the multiple lower power states; or, b) sending a second signal on a second signal line that identifies the specific one of the multiple lower power states.Type: ApplicationFiled: September 27, 2016Publication date: March 29, 2018Inventors: Brian R. McFarlane, Robert J. Royer, Anoop Mukker, Eng Hun Ooi, Ritesh B. Trivedi
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Patent number: 9792246Abstract: An I/O interface supports scrambling, where the scrambling can include nonlinear scrambling of the scrambling code, or dynamic bus inversion of the scrambling code, or selective switching of selected bits of the scrambling code, or a combination of these. The transmitting device includes a scrambler and the receiving device includes a descrambler. Both the scrambler and the descrambler generate a linear feedback scrambling code modified by applying one or more of the techniques mentioned above. The modified scrambling code may cause fewer than half of the scrambled output bits to be toggled with respect to a previous scrambled output. The scrambler applies the modified scrambling code to a signal to transmit. The descrambler applies the modified scrambling code to a received signal.Type: GrantFiled: December 27, 2014Date of Patent: October 17, 2017Assignee: Intel CorporationInventors: Ee Loon Teoh, Eng Hun Ooi, Christopher P Mozak, Brian R McFarlane
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Publication number: 20170213034Abstract: A hardware platform includes a nonvolatile storage device that can store system firmware as well as code for the primary operating system for the hardware platform. The hardware platform includes a controller that determines the hardware platform lacks functional firmware to boot the primary operating system from the storage device. The controller accesses a firmware image from an external interface that interfaces a device external to the hardware platform, where the external device is a firmware image source. The controller provisions the firmware from the external device to the storage device and initiates a boot sequence from the provisioned firmware.Type: ApplicationFiled: January 30, 2017Publication date: July 27, 2017Inventors: Nitin V. SARANGDHAR, Robert J. ROYER, JR., Eng Hun OOI, Brian R. MCFARLANE, Mukesh KATARIA
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Publication number: 20170090509Abstract: These present disclosure provides devices and techniques to dynamically change the operating frequency of an interface where components on the interface have non-common clocks. An interface component may be provided with a frequency negation component to negotiate a shift in an operating frequency with other component on an interface where the different component have non-common clocks.Type: ApplicationFiled: September 25, 2015Publication date: March 30, 2017Applicant: Intel CorporationInventors: ANOOP MUKKER, ENG HUN OOI, ROBERT J. ROYER, JR., BRIAN R. MCFARLANE
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Publication number: 20170091127Abstract: Examples may include techniques to couple with a storage device via multiple communication ports. A first communication port at the storage device may be configurable to couple with at least one other storage device, a field programmable gate array (FPGA)/programmable logic or application-specific integrated circuit (ASIC) via a serial communication link. A second communication port at the storage device is arranged to couple with a host computing device.Type: ApplicationFiled: September 25, 2015Publication date: March 30, 2017Inventors: JAWAD B. KHAN, RANDALL K. WEBB, KELVIN D. GREEN, BRIAN R. MCFARLANE
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Patent number: 9594910Abstract: A hardware platform includes a nonvolatile storage device that can store system firmware as well as code for the primary operating system for the hardware platform. The hardware platform includes a controller that determines the hardware platform lacks functional firmware to boot the primary operating system from the storage device. The controller accesses a firmware image from an external interface that interfaces a device external to the hardware platform, where the external device is a firmware image source. The controller provisions the firmware from the external device to the storage device and initiates a boot sequence from the provisioned firmware.Type: GrantFiled: March 28, 2014Date of Patent: March 14, 2017Assignee: Intel CorporationInventors: Nitin V. Sarangdhar, Robert J. Royer, Jr., Eng Hun Ooi, Brian R. McFarlane, Mukesh Kataria
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Publication number: 20160188523Abstract: An I/O interface supports scrambling, where the scrambling can include nonlinear scrambling of the scrambling code, or dynamic bus inversion of the scrambling code, or selective switching of selected bits of the scrambling code, or a combination of these. The transmitting device includes a scrambler and the receiving device includes a descrambler. Both the scrambler and the descrambler generate a linear feedback scrambling code modified by applying one or more of the techniques mentioned above. The modified scrambling code may cause fewer than half of the scrambled output bits to be toggled with respect to a previous scrambled output. The scrambler applies the modified scrambling code to a signal to transmit. The descrambler applies the modified scrambling code to a received signal.Type: ApplicationFiled: December 27, 2014Publication date: June 30, 2016Inventors: Ee Loon Teoh, Eng Hun Ooi, Christopher P. Mozak, Brian R. McFarlane
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Publication number: 20150277930Abstract: A hardware platform includes a nonvolatile storage device that can store system firmware as well as code for the primary operating system for the hardware platform. The hardware platform includes a controller that determines the hardware platform lacks functional firmware to boot the primary operating system from the storage device. The controller accesses a firmware image from an external interface that interfaces a device external to the hardware platform, where the external device is a firmware image source. The controller provisions the firmware from the external device to the storage device and initiates a boot sequence from the provisioned firmware.Type: ApplicationFiled: March 28, 2014Publication date: October 1, 2015Inventors: Nitin V. Sarangdhar, Robert J. Royer, JR., Eng Hun Ooi, Brian R. McFarlane, Mukesh Kataria