Patents by Inventor Brian W. Jones

Brian W. Jones has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240099815
    Abstract: Structured surfaces are described. In one embodiment, the structured surface comprises a plurality of structures having a complement cumulative slope magnitude distribution (Fcc) such that at least 30, 40, 50, 60, 70, 80 or 90% of structures have a slope greater than 10 degrees; and less than 80% of the structures have a slope greater than 35 degrees. In other embodiments, the structures comprise peaks and valleys defined by a Cartesian coordinate system such that the peaks and valleys have a width and length in the x-y plane and a height in the z-direction and at least a portion of the peaks and/or valleys vary in height in the y direction and/or the x-direction by at least 10% of the average height. Articles and methods are also described.
    Type: Application
    Filed: February 4, 2022
    Publication date: March 28, 2024
    Inventors: Jodi L. Connell, Raymont P. Johnston, Karl J.L Geisler, Brian W. Lueck, John J. Sullivan, Vivian W. Jones, Gordon A. Kuhnley
  • Patent number: 11939343
    Abstract: The present disclosure relates to STING (Stimulator of Interferon Genes) agonist compounds, methods of making the compounds and their methods of use.
    Type: Grant
    Filed: September 9, 2021
    Date of Patent: March 26, 2024
    Assignee: Mersana Therapeutics, Inc.
    Inventors: Jeremy R. Duvall, Keith W. Bentley, Brian D. Jones, Eugene W. Kelleher, Soumya S. Ray, Joshua D. Thomas, Dorin Toader
  • Patent number: 8231309
    Abstract: A pier bracket comprises a metal bar having a plurality of bolt holes formed through a top half of the metal bar and a plurality of opposingly faced barbs extending from planar side surfaces in a lower half of the metal bar. The barbs are configured to provide asymmetrical resistance force to movement of the pier bracket when received within an aperture formed in a concrete pier or footing.
    Type: Grant
    Filed: December 10, 2009
    Date of Patent: July 31, 2012
    Assignee: Willamette Graystone, Inc.
    Inventors: Donald W. Jones, Brian W. Jones
  • Publication number: 20110142547
    Abstract: A pier bracket comprises a metal bar having a plurality of bolt holes formed through a top half of the metal bar and a plurality of opposingly faced barbs extending from planar side surfaces in a lower half of the metal bar. The barbs are configured to provide asymmetrical resistance force to movement of the pier bracket when received within an aperture formed in a concrete pier or footing.
    Type: Application
    Filed: December 10, 2009
    Publication date: June 16, 2011
    Applicant: WILLAMETTE GRAYSTONE, INC.
    Inventors: Donald W. Jones, Brian W. Jones
  • Patent number: 6351099
    Abstract: An apparatus for monitoring the condition of a battery. The apparatus includes a battery clip that is used to secure a battery to a battery connection and a battery monitoring IC. The battery monitoring IC takes a “load vs. no-load measurement” and the results are recorded in a register. When the battery reaches a certain low voltage state, register bits are set and an output is generated. Furthermore, the exemplary embodiment includes a removal detection circuit for detecting removal and replacement of the battery and for preventing voltage floating on the battery output line.
    Type: Grant
    Filed: January 31, 2001
    Date of Patent: February 26, 2002
    Assignee: Dallas Semiconductor Corporation
    Inventors: Brian W. Jones, Scott E. Jones
  • Publication number: 20010005123
    Abstract: An apparatus for monitoring the condition of a battery. The apparatus includes a battery clip that is used to secure a battery to a battery connection and a battery monitoring IC. The battery monitoring IC takes a “load vs. no-load measurement” and the results are recorded in a register. When the battery reaches a certain low voltage state, register bits are set and an output is generated. Furthermore, the exemplary embodiment includes a removal detection circuit for detecting removal and replacement of the battery and for preventing voltage floating on the battery output line.
    Type: Application
    Filed: January 31, 2001
    Publication date: June 28, 2001
    Inventors: Brian W. Jones, Scott E. Jones
  • Patent number: 6208114
    Abstract: An apparatus for monitoring the condition of a battery. The apparatus includes a battery clip that is used to secure a battery to a battery connection and a battery monitoring IC. The battery monitoring IC takes a “load vs. no-load measurement” and the results are recorded in a register. When the battery reaches a certain low voltage state, register bits are set and an output is generated. Furthermore, the exemplary embodiment includes a removal detection circuit for detecting removal and replacement of the battery and for preventing voltage floating on the battery output line.
    Type: Grant
    Filed: July 22, 1999
    Date of Patent: March 27, 2001
    Assignee: Dallas Semiconductor Corporation
    Inventors: Brian W. Jones, Scott E. Jones
  • Patent number: 5959926
    Abstract: A programmable power controller controls power between a primary power source and a secondary power source and powering first circuitry. The primary power source has a first voltage and the secondary power source has a second voltage. A control register has a first field, which is field used to activate circuitry used to direct power from the primary power source to the secondary power source. First logic circuitry compares the first voltage and the second voltage to determine which is greater and then couples the primary power source or the secondary power source, depending upon which is greater, to power the first logic circuitry, second logic circuitry, and memory. The memory is coupled to the first logic circuitry and is read and written to via an input/output buffer.
    Type: Grant
    Filed: April 13, 1998
    Date of Patent: September 28, 1999
    Assignee: Dallas Semiconductor Corp.
    Inventors: Brian W. Jones, Alan Mark Morton
  • Patent number: 5731685
    Abstract: A battery management chip which controls charging and discharging currents of a rechargeable battery. Another significant teaching of the presently preferred embodiment is a battery manager integrated circuit which includes an on-chip bandgap voltage reference. The circuitry for bandgap voltage references is conventional, and a variety of circuit configurations are very well-known, but bandgap voltage references normally have a significant power consumption. However, the precise voltage reference derived from such a circuit is extremely useful in performing precise and optimal control of battery function.
    Type: Grant
    Filed: May 7, 1996
    Date of Patent: March 24, 1998
    Assignee: Dallas Semiconductor Corporation
    Inventor: Brian W. Jones
  • Patent number: 5567993
    Abstract: A programmable power controller for controlling power between a primary power source and a second power source and powering first circuitry, each of which has a voltage, comprises a control register having a first field, which is used to activate circuitry used to direct power from the primary power source to the second power source, and circuitry to compare the first voltage and the second voltage to determine which is greater and then coupling the primary power source or the second power source depending upon which is greater to power the first circuitry. The control register also has a second field used to select an electrical path having a first voltage drop that ensures the primary power source will have a higher voltage when the primary power source is active under normal operating conditions and a third field used to select an electrical path of a plurality of electrical paths, each electrical path having a variety of voltage drops and resistances.
    Type: Grant
    Filed: June 23, 1994
    Date of Patent: October 22, 1996
    Assignee: Dallas Semiconductor Corporation
    Inventors: Brian W. Jones, Alan M. Morton
  • Patent number: 5537360
    Abstract: A programmable power controller controls power between a primary power source and a secondary power source and powering first circuitry. The primary power source has a first voltage and the secondary power source has a second voltage. A control register has a first field, which is field used to activate circuitry used to direct power from the primary power source to the secondary power source. First logic circuitry compares the first voltage and the second voltage to determine which is greater and then couples the primary power source or the secondary power source, depending upon which is greater, to power the first logic circuitry, second logic circuitry, and memory. The memory is coupled to the first logic circuitry and is read and written to via an input/output buffer.
    Type: Grant
    Filed: September 16, 1994
    Date of Patent: July 16, 1996
    Assignee: Dallas Semiconductor Corporation
    Inventors: Brian W. Jones, Alan M. Morton
  • Patent number: 5514945
    Abstract: A battery management chip which controls charging and discharging currents of a rechargeable battery. Another significant teaching of the presently preferred embodiment is a battery manager integrated circuit which includes an on-chip bandgap voltage reference. The circuitry for bandgap voltage references is conventional, and a variety of circuit configurations are very well-known, but bandgap voltage references normally have a significant power consumption. However, the precise voltage reference derived from such a circuit is extremely useful in performing precise and optimal control of battery function.
    Type: Grant
    Filed: July 5, 1994
    Date of Patent: May 7, 1996
    Assignee: Dallas Semiconductor Corporation
    Inventor: Brian W. Jones
  • Patent number: 5168206
    Abstract: A battery management chip which controls charging and discharging currents of a rechargeable battery. In a portable module, the battery manager chip controls the charging and discharging of the rechargeable battery which powers the whole module, and is therefore connected directly to the battery and to the source of charging current. The chip is also connected to draw very small amounts of current from a third, stable battery, preferably a lithium battery, which is not necessarily rechargeable.
    Type: Grant
    Filed: December 21, 1990
    Date of Patent: December 1, 1992
    Assignee: Dallas Semiconductor Corp.
    Inventor: Brian W. Jones
  • Patent number: 5151644
    Abstract: A battery management chip which controls charging and discharging currents of a rechargeable battery. A further novel teaching set forth in the present application is an integrated circuit which includes a crystal-controlled oscillator for precise time measurement. Crystal-controlled oscillators are normally fairly power-hungry circuits, and such circuits would not normally be used in the low-power part unless needed. However, according to this innovative teaching, the precise time integration provided by the crystal oscillator is significantly advantageous, since it permits accurate time integration to derive the present state of the battery after multiple charge and discharge cycles. In addition, in the presently preferred embodiment, a low-power crystal-controlled oscillator is used.
    Type: Grant
    Filed: December 21, 1990
    Date of Patent: September 29, 1992
    Assignee: Dallas Semiconductor Corporation
    Inventors: Ronald W. Pearson, Brian W. Jones
  • Patent number: 5103156
    Abstract: A battery management chip which controls charging and discharging currents of a rechargeable battery. The chip includes a differential temperature-sensing circuit, for connection to two separate temperature-sensing devices. Thus, one thermistor can be placed in close thermal contact with the casing of the battery, while the other thermistor is exposed to ambient temperature. This permits a temperature rise in the battery to be sensed. This is very useful in controlling charging characteristics. Otherwise, the rate of charging current may be excessive under a low ambient temperature and lower than necessary under high ambient temperature.
    Type: Grant
    Filed: December 21, 1990
    Date of Patent: April 7, 1992
    Assignee: Dallas Semiconductor Corporation
    Inventors: Brian W. Jones, Ronald W. Pearson
  • Patent number: 5027326
    Abstract: A RAM-based FIFO which provides self-timing of the data outputs in read mode. When the data output is not valid, the data output drivers are in a high-impedance condition. Therefore, FIFOs using this RAM-based architecture can readily be combined to provide a wider or deeper FIFO, without introducing any additional delay whatsoever. Small differential delays are preferably introduced in the activation of the output buffers, to avoid noise on power supply lines.
    Type: Grant
    Filed: November 10, 1988
    Date of Patent: June 25, 1991
    Assignee: Dallas Semiconductor Corporation
    Inventor: Brian W. Jones
  • Patent number: 4646590
    Abstract: A kit and method for constructing a temporary key template from a key code of a lock having pin tumblers is disclosed. The temporary key template is used as a master in order to make a permanent duplicate key having appropriate serrations from a suitable uncut key. The kit includes a converter blank key having an elongate bar in which a plurality of apertures are provided. These apertures are spaced at predetermined distances from one another which correspond to the respective distances between the pin tumblers of the lock. A plurality of different pins are provided which are adapted to be inserted into any of the apertures so that a predetermined upper portion of the pin extends above the elongate bar. The particular pin need for an aperture is determined by the key code so that by filling the appropriate apertures with appropriate pins, a temporary key template is constructed which is easily duplicated on a conventional key duplicating machine.
    Type: Grant
    Filed: November 21, 1985
    Date of Patent: March 3, 1987
    Inventors: Brian W. Jones, Richard L. Hagens
  • Patent number: 4619668
    Abstract: A cellulosic fabric is treated with a crosslinking agent selected from the group consisting of: an adduct from an amide and glyoxal, an acetal derived from a dialdehyde and an aldehyde other than formaldehyde and an acidic catalyst. The catalyst and crosslinking agent is of sufficient amount and concentration to impregnate the fabric and produce wrinkle-resistance and smooth-drying finishes when dried from about 3-10 minutes at from about 60.degree.-100.degree. C. and then cured from about 1-5 minutes at from about 120.degree.-180.degree. C. The resultant fabric is then dyed.
    Type: Grant
    Filed: September 11, 1985
    Date of Patent: October 28, 1986
    Assignee: The United States of America as represented by the Secretary of Agriculture
    Inventors: John G. Frick, Jr., Brian W. Jones, Robbie L. Stone, Michael D. Watson