Abstract: In overview, the technology is primarily directed to the implementation of linked gaming in respect of a plurality of gaming machines. In particular, a controller device is disclosed, this controller device being adapted to enable the management of a plurality of linked games via a single piece of hardware. This is achieved in part by virtualization of jackpot controllers within the controller device. More specifically, a user is enabled to configure a plurality of virtual jackpot controllers by way of interaction with a graphical user interface, and select compatible electronic gaming machines to participate in a linked game provided by a given one of the virtual jackpot controllers.

Abstract: Technology described herein includes an arrangement whereby a hardware-based solution is implemented to enable mirroring of NVRAM data in a master server directly to NVRAM in a sleeper server. Both the master server and sleeper server implement a like motherboard unit, which is configured to implement the mirroring technology. That is, the roles of master and sleeper may be reversed. The master server includes a hardware module that monitors (but does not affect) NVRAM operations at the master server, and replicates those operations via a high speed communications link, such as a fiber optic link, to the sleeper server. The term “high speed communications link” refers to a link with at least 2.5 gigabit speed, and preferably at least 5 gigabit speed. The sleeper server is configured to, when in sleeper mode, suspend control of its own NVRAM module. Instead, the NVRAM module is controlled by a module that is configured to receive NVRAM operations via the fiber optic link, and apply those operations.

Abstract: In overview, the technology is primarily directed to the implementation of linked gaming in respect of a plurality of gaming machines. In particular, a controller device is disclosed, this controller device being adapted to enable the management of a plurality of linked games via a single piece of hardware. This is achieved in part by virtualization of jackpot controllers within the controller device. More specifically, a user is enabled to configure a plurality of virtual jackpot controllers by way of interaction with a graphical user interface, and select compatible electronic gaming machines to participate in a linked game provided by a given one of the virtual jackpot controllers.

Abstract: In overview, the technology is primarily directed to the implementation of linked gaming in respect of a plurality of gaming machines. In particular, a controller device is disclosed, this controller device being adapted to enable the management of a plurality of linked games via a single piece of hardware. This is achieved in part by virtualization of jackpot controllers within the controller device. More specifically, a user is enabled to configure a plurality of virtual jackpot controllers by way of interaction with a graphical user interface, and select compatible electronic gaming machines to participate in a linked game provided by a given one of the virtual jackpot controllers.

Abstract: Technology described herein includes an arrangement whereby a hardware-based solution is implemented to enable mirroring of NVRAM data in a master server directly to NVRAM in a sleeper server. Both the master server and sleeper server implement a like motherboard unit, which is configured to implement the mirroring technology. That is, the roles of master and sleeper may be reversed. The master server includes a hardware module that monitors (but does not affect) NVRAM operations at the master server, and replicates those operations via a high speed communications link, such as a fiber optic link, to the sleeper server. The term “high speed communications link” refers to a link with at least 2.5 gigabit speed, and preferably at least 5 gigabit speed. The sleeper server is configured to, when in sleeper mode, suspend control of its own NVRAM module. Instead, the NVRAM module is controlled by a module that is configured to receive NVRAM operations via the fiber optic link, and apply those operations.

Abstract: In overview, the technology is primarily directed to the implementation of linked gaming in respect of a plurality of gaming machines. In particular, a controller device is disclosed, this controller device being adapted to enable the management of a plurality of linked games via a single piece of hardware. This is achieved in part by virtualization of jackpot controllers within the controller device. More specifically, a user is enabled to configure a plurality of virtual jackpot controllers by way of interaction with a graphical user interface, and select compatible electronic gaming machines to participate in a linked game provided by a given one of the virtual jackpot controllers.

Abstract: A base encryption method may be applied to plain data to form base encrypted data. An installation encryption method may be applied to the base encryption data to provide encrypted installation data. During installation, the encrypted installation data are encrypted to form encrypted storage data for storage on a storage medium such as a hard drive. Preferably, the data are not fully decrypted at any stage of the installation process. The host CPU may be minimally involved (or not involved) in the encryption/decryption process. Some embodiments provide a logic seal (a/k/a a “tell-tale circuit”) that monitors access to a machine. In some such implementations, an encryption/decryption key may be stored in the logic seal. When the logic seal is broken, countermeasures may be taken, e.g., at least some data may be deleted. For example, one or more cryptographic keys may be erased.

Abstract: Some wager gaming machines described herein include a switch that has an internet protocol (IP) address mapping function. The switch may have its own memory for maintaining gaming information, such as security information, state information, configuration parameters, etc. The switch may have embedded security functions that can operate even if a motherboard of the gaming machine is powered off or is otherwise inoperative. The function of the switch may change according to the function of the gaming machine. For example, when the motherboard is operational, the switch may route messages passively. When the motherboard is inoperative, the switch may take control of predetermined functionality. Even when the motherboard is fully operational, the switch may allow remote access to a peripheral device. In some implementations a logic device, such as a programmable logic device, may provide remote access and/or monitoring functions when the motherboard is inoperative.

Abstract: A base encryption method may be applied to plain data to form base encrypted data. An installation encryption method may be applied to the base encryption data to provide encrypted installation data. During installation, the encrypted installation data are encrypted to form encrypted storage data for storage on a storage medium such as a hard drive. Preferably, the data are not fully decrypted at any stage of the installation process. The host CPU may be minimally involved (or not involved) in the encryption/decryption process. Some embodiments provide a logic seal (a/k/a a “tell-tale circuit”) that monitors access to a machine. In some such implementations, an encryption/decryption key may be stored in the logic seal. When the logic seal is broken, countermeasures may be taken, e.g., at least some data may be deleted. For example, one or more cryptographic keys may be erased.