Abstract: A dual PHY-based integrated access device (IAD) platform employs a highly integrated time division multiplexed (TDM), a synchronous transfer mode (ATM) cell based architecture, to provide enhanced interfacing flexibility for multiple and diverse signaling protocols, effectively reducing the cost and constraints as to choice of host processor used in conventional digital signal processor (DSP)-based IADs. With the signaling transport speed of the dual PHY based path being an order of magnitude greater than that of any of the plurality of communication paths with which the IAD is interfaced, the IAD of the invention provides effectively real time support for different communication requirements, including TDM, ATM, HDLC, and the like.

Abstract: A cascaded signal processing arrangement processes digitally encoded voice samples transported over a time division multiplex (TDM) communication path for application to a processor-controlled digital communication device, in particular an integrated access device. Processed voice samples are packetized in accordance with an encapsulating protocol and transmitted as a packetized voice output stream to a destination receiver device. The arrangement includes an echo canceller coupled to the TDM communication path and performing echo cancellation processing on the digitally encoded voice samples. The echo cancellation-processed voice sample signals are compressed by a data compression operator and applied to a packet encapsulating host processor via the TDM communication path. This obviates the necessity of the host processor having to use data bus cycles to download processed digitized voice samples.

Abstract: A voice path direct memory access (DMA)-based packet generation mechanism writes digitally encoded voice samples directly into prescribed subportions of a preallocated portion of random access memory, to avoid interrupting a main processor for the purpose. A pointer to a respective buffer space subportion is presented to a protocol stack, so that one or more overhead bytes for the stored voice samples can be generated and written into adjacent address space of the preallocated portion of random access memory. The contents of the preallocated memory space are then serialized out for transmission to a destination receiver.

Abstract: Adaptive clock recovery for the receiving entity of a communication system transporting constant bit-rate (CBR) services over an asynchronous transfer mode (ATM) or ATM-like network is performed by a digital phase locked loop (DPLL). The recovered clock is based on the DPLL's phase detector's count of high frequency service clock cycles between transitions in an input signal representative of instances of receipt of ATM cells subject to cell delay variations through the network, and a reference clock signal whose frequency is a prescribed fraction of that of the output clock. The DPLL's VCO function is an increment/decrement of the service clock frequency, which avoids constraining the operation of a high performance modem (such as a V.90 modem).

Abstract: A dual PHY-based integrated access device (IAD) platform employs a highly integrated time division multiplexed (TDM), a synchronous transfer mode (ATM) cell based architecture, to provide enhanced interfacing flexibility for multiple and diverse signaling protocols, effectively reducing the cost and constraints as to choice of host processor used in conventional digital signal processor (DSP)-based IADs. With the signaling transport speed of the dual PHY based path being an order of magnitude greater than that of any of the plurality of communication paths with which the IAD is interfaced, the IAD of the invention provides effectively real time support for different communication requirements, including TDM, ATM, HDLC, and the like.

Abstract: A cascaded signal processing arrangement processes digitally encoded voice samples transported over a time division multiplex (TDM) communication path for application to a processor-controlled digital communication device, in particular an integrated access device. Processed voice samples are packetized in accordance with an encapsulating protocol and transmitted as a packetized voice output stream to a destination receiver device. The arrangement includes an echo canceller coupled to the TDM communication path and performing echo cancellation processing on the digitally encoded voice samples. The echo cancellation-processed voice sample signals are compressed by a data compression operator and applied to a packet encapsulating host processor via the TDM communication path. This obviates the necessity of the host processor having to use data bus cycles to download processed digitized voice samples.

Abstract: A voice path direct memory access (DMA)-based packet generation mechanism writes digitally encoded voice samples directly into prescribed subportions of a preallocated portion of random access memory, to avoid interrupting a main processor for the purpose. A pointer to a respective buffer space subportion is presented to a protocol stack, so that one or more overhead bytes for the stored voice samples can be generated and written into adjacent address space of the preallocated portion of random access memory. The contents of the preallocated memory space are then serialized out for transmission to a destination receiver.

Abstract: Adaptive clock recovery for the receiving entity of a communication system transporting constant bit-rate (CBR) services over an asynchronous transfer mode (ATM) or ATM-like network is performed by a digital phase locked loop (DPLL). The recovered clock is based on the DPLL's phase detector's count of high frequency service clock cycles between transitions in an input signal representative of instances of receipt of ATM cells subject to cell delay variations through the network, and a reference clock signal whose frequency is a prescribed fraction of that of the output clock. The DPLL's VCO function is an increment/decrement of the service clock frequency, which avoids constraining the operation of a high performance modem (such as a V.90 modem).