Abstract: A device, integrated circuit and method for generating simulated errors are disclosed. In the disclosed device, integrated circuit and method, an original data value is read from a memory. The original data value is intercepted by the integrated circuit. The integrated circuit is operable to virtualize an error in the original data value to generate a modified data value. The integrated circuit is also operable to generate an interrupt according to the virtualization. This disclosure may be particularly useful for high-level memory validation.

Abstract: A heads-up display comprises a housing. A display panel is disposed within the housing. An objective lens is disposed within the housing. An achromatic lens is disposed within the housing between the display panel and the objective lens.

Abstract: Snooping in SAS expander networks is disclosed. Ports in a SAS expander may include snoop circuitry and a snoop tap which allows snoop data to be diverted for snooping prior to any significant transformation of the traffic by the regular port logic. Furthermore, the snoop circuitry can receive OOB signaling and convert it to K characters for transmission through the SAS network and subsequent analysis by a protocol analyzer. The ports and cascades in the expander network can be configured to create snoop paths to enable snoop data to be passed through the network to locations where a protocol analyzer can be easily attached. With SAS snoop ports, there is no disruption to the system. Because only a copy of the data is routed to the analyzer, there is no change to the original signal path and latency is identical with or without the analyzer.

Abstract: Heat transfer between a fluid-bearing flexible tube and a heat-conducting surface is improved by fixing a flexible heat-conducting sheath to the flexible tube and by compressive fixing that distorts the tube and deforms the sheath and/or the surface. The tube can be made of cross-linked polythene (PEX). The sheath can be spirally wound high-purity aluminum wire. The sheath enables efficient heat transfer between the outer surface of the tube and the heat-conducting surface. Applications include radiant heating and cooling. Tube layout can be customized and variable tube spacing is possible, for example by using a castellated layer to support the tube.

Abstract: Disclosed herein are apparatus and methods for filtering a fluid including a filter module assembly coupled to a manifold. The manifold may include a manifold inlet in fluid communication with a source of feed liquid, an outlet in fluid communication with header of the filter module assembly, a fluid passageway in fluid communication with the manifold inlet, a source of gas, and the outlet, a second fluid passageway in fluid communication with the header and the first fluid passageway and a second manifold outlet vertically displaced from the first manifold outlet and in fluid communication between the first fluid passageway and the second fluid passageway.

Abstract: Disclosed herein are apparatus and methods for filtering a fluid including a filter module assembly coupled to a manifold. The manifold may include a manifold inlet in fluid communication with a source of feed liquid, an outlet in fluid communication with header of the filter module assembly, a fluid passageway in fluid communication with the manifold inlet, a source of gas, and the outlet, a second fluid passageway in fluid communication with the header and the first fluid passageway and a second manifold outlet vertically displaced from the first manifold outlet and in fluid communication between the first fluid passageway and the second fluid passageway.

Abstract: A module arrangement (5) according to an embodiment of the invention consists of a plurality of membrane modules (6) arranged in a two dimensional array (7) and extending between upper and lower block-type manifolds (8) and (9), respectively. The array of modules is further divided into sub-groups of modules (10) separated from each other by space (11) extending transversely across the membrane array (7). An integrated support frame (12) is positioned in the space (11) between the sub-groups (10) and is fixed to the upper and lower manifold blocks (8) and (9) to form an integrated support structure within the module array (7).

Abstract: The efficiency of radiant space heating or cooling is improved and the use of renewable energy sources enabled by reducing the resistance of the thermal path through cladding used in the floor, walls or ceiling of a domestic or commercial living space. The resistance of the thermal path is reduced by constructing the cladding with an array of thermal bridges each comprising a thermal shunt connected to a heat-collecting layer and to a heat-dispersing layer. Such bridged cladding extends the range of choice of interior cladding and of configuration of radiant system.

Abstract: A plant watering device is disclosed. The device has a preferentially water permeable membrane arranged to separate a supply of water from a root system of a plant. The membrane is arranged to allow water to permeate to water the roots.

Abstract: Provided is an improved filtration module assembly comprising a vessel having a filtration cartridge disposed within it and a header coupled to an end of the vessel, the header including a housing having an open-ended upper end and a lower end, and an end cap including a portion that mates with a complimentary structure defined by the inner all of the open ended upper end of the housing to removable engage with the housing and the end cap may further define a passageway for fluid to flow out of the vessel. The filtration module assembly may enable an improved manifold arrangement used to communicate fluids to and from a filtration system comprising a plurality of such modules and the configurations of the present invention may facilitate improved operation of such filtration systems.

Abstract: A device, integrated circuit and method for generating simulated errors are disclosed. In the disclosed device, integrated circuit and method, an original data value is read from a memory. The original data value is intercepted by the integrated circuit. The integrated circuit is operable to virtualize an error in the original data value to generate a modified data value. The integrated circuit is also operable to generate an interrupt according to the virtualization. This disclosure may be particularly useful for high-level memory validation.

Abstract: Embodiments of the invention enable error simulation for system validation. Errors can be simulated by modifying data presented to the processor as well as generating interrupts consistent with the modified data in the ASIC hardware. Modify logic may be added to the ASIC so when the microprocessor attempts to read a specific address, the modify logic may mask one or more of the data bits returned by the requested address. Address, bit mask, and force value data may be stored in registers to determine which address may be modified, the bit location to be modified, and the value that bit location should be changed to. Selection logic may then determine whether data from the modify logic or the unmodified value from an attached device should be sent to the ASIC interface and on to the microprocessor. A timer may also be used to decouple the setup from the test.

Abstract: A wave energy converter comprises a pitching floating vessel and means for converting the pitching motion to electrical power. By varying the distribution of the ballast mass in the vessel and by varying the vessel's immersed length the moments of inertia of mass and of added mass are varied and wave-bridging is controlled. The immersed length of the vessel is varied by changing the draft of a v-shaped hull. Roll and yaw are suppressed by a vertical fin held at a substantial depth Inside the vessel is a compact pendulum that is a combination of tracked and folding pendulums. Both vessel and compact pendulum can be simultaneously and dynamically tuned over the range of periods that characterize high-energy ocean swells.

Abstract: Wave energy converter efficiency is improved by dynamic tuning over periods from 5 to 15 seconds. Tuning methods are: for heaving, mass is varied by locking and unlocking neutrally buoyant masses or by trapping and releasing seawater; for surging, water-plane area is varied by force; for rotational variants of heaving and surging and for pitching, the radius of gyration is varied. Fixed mass is reduced by using materials and structures with high ratios of strength to weight. Fixed added mass is reduced by streamlining, by constant radius body profiles and by keeping moving structures out of the water. Added mass is varied continuously by using variable angle fins: effectiveness is enhanced by enclosure. In pitching, wave-bridging is addressed by limiting length, using locking and unlocking segments of the floating body or by using gravity as the restoring force. Solutions are described for heaving, surging, pitching and wave-following.

Abstract: A heads-up display comprises a housing. A display panel is disposed within the housing. An objective lens is disposed within the housing. An achromatic lens is disposed within the housing between the display panel and the objective lens.

Abstract: Embodiments of the invention enable error simulation for system validation. Errors can be simulated by modifying data presented to the processor as well as generating interrupts consistent with the modified data in the ASIC hardware. Modify logic may be added to the ASIC so when the microprocessor attempts to read a specific address, the modify logic may mask one or more of the data bits returned by the requested address. Address, bit mask, and force value data may be stored in registers to determine which address may be modified, the bit location to be modified, and the value that bit location should be changed to. Selection logic may then determine whether data from the modify logic or the unmodified value from an attached device should be sent to the ASIC interface and on to the microprocessor. A timer may also be used to decouple the setup from the test.

Abstract: This invention relates to error simulation for system validation. Errors can be simulated by modifying data presented to the processor as well as generating interrupts consistent with the modified data in the ASIC hardware. Modify logic may be added to the ASIC so when the microprocessor attempts to read a specific address, the modify logic may mask one or more of the data bits returned by the requested address. Address, bit mask, and force value data may be stored in registers to determine which address may be modified, the bit location to be modified, and the value that bit location should be changed to. Selection logic may then determine whether data from the modify logic or the unmodified value from an attached device should be sent to the ASIC interface and on to the microprocessor. A timer may also be used to decouple the setup from the test.

Abstract: A module arrangement (5) according to an embodiment of the invention consists of a plurality of membrane modules (6) arranged in a two dimensional array (7) and extending between upper and lower block-type manifolds (8) and (9), respectively. The array of modules is further divided into sub-groups of modules (10) separated from each other by space (11) extending transversely across the membrane array (7). An integrated support frame (12) is positioned in the space (11) between the sub-groups (10) and is fixed to the upper and lower manifold blocks (8) and (9) to form an integrated support structure within the module array (7).

Abstract: In a first membrane filtration module comprises a membrane module comprising a plurality of permeable hollow membranes; a fluid distribution device adapted to removably surround at least a portion of the membranes of the membrane module, the fluid distribution device comprising a plurality of through-hole openings for distributing a fluid, and the fluid distribution device adapted to distribute a flow of fluid along a surface of the permeable hollow membranes. In a second membrane filtration device comprises a membrane module comprising a plurality of permeable hollow membranes, each of the permeable hollow membranes having a surface; and a gas distribution device: adapted to distribute gas bubbles to the surface of the permeable hollow membrane, adapted to removably surround at least a portion of the plurality of permeable hollow membranes, and defining a plurality of through openings for distributing the gas bubbles to the membranes.