Abstract: This disclosure generally relates to hypervisor memory virtualization. In an example, multiple page table stages may be used to provide a page table that may be used by a processor when processing a workload for a nested virtual machine. An intermediate (e.g., nested) hypervisor may request an additional page table stage from a parent hypervisor, which may be used to virtualize memory for one or more nested virtual machines managed by the intermediate hypervisor. Accordingly, a processor may use the additional page table stages to ultimately translate a virtual memory address for a nested virtual machine to a physical memory address.

Abstract: This disclosure generally relates to hypervisor memory virtualization. In an example, translation lookaside buffer (TLB) invalidation requests may be selectively delivered to processors to which they relate or may be ignored by processors to which they do not relate, so as to minimize the processing overhead that may be ordinarily associated with such TLB invalidation requests. In another example, a TLB invalidation request may be suspended in order to enable a hypervisor to finish executing instructions relating to one or more TLB entries that would be affected by the TLB invalidation request.

Abstract: This disclosure generally relates to securely launching a hypervisor and subsequently validating that the hypervisor was securely launched. As is described herein, once a hypervisor has been initialized or has otherwise launched, a verification operation is performed. The verification operation may be used to ensure that the hypervisor was securely launched. When it is determined that the hypervisor was securely launched, one or more platform details are obtained. These platform details may then be stored in a memory device.

Abstract: This disclosure generally relates to time and timer techniques that may be used to virtualize one or more virtual machines. In an example, it may be possible to save and restore a timer of a virtual machine while preserving timer information associated with the timer (e.g., an expiration time, whether the most recent expiration has been signaled, and the enable bit, etc.). For example, a first mode may enable restoring a timer based on a previously-existing enable bit, thereby retaining the state of the timer (e.g., whether the timer is programmed to fire and/or whether the most recent expiration has been signaled). By contrast, a second mode of setting a timer may automatically set the enable bit, thereby automatically enabling the timer to fire, as may be expected by a virtual machine when setting a timer.

Abstract: This disclosure generally relates to enabling a hypervisor of a host machine to provide virtual interrupts to select virtual processors or a set of virtual processors. More specifically, the present disclosure describes how a hypervisor of a host machine may monitor the status of one or more virtual processors that are executing on the host machine and deliver interrupts to the virtual processors based on a number of factors including, but not limited to, a priority of the interrupt, a priority of the virtual processor, a current workload of the virtual processor and so on.

Abstract: This disclosure generally relates to time and timer techniques that may be used to virtualize one or more virtual machines. In an example, a plurality of host machines may each have clocks that operate at pre-determined or known frequencies, such that it may be possible to easily migrate a virtual machine from one host machine to another host machine using an offset, thereby providing consistent time information to the virtual machine. In some examples, a scale factor or multiplier may also be used in order to achieve a consistent frequency. For example, a first host machine may have a clock operating at 1 GHz, while a second host machine may have a clock operating at 500 MHz. In such an example, a multiplier may be used to double the frequency of the second host machine to match the clock of the first host machine, thereby providing consistent time information.

Abstract: This disclosure generally relates to enabling a hypervisor of a host machine to provide virtual interrupts to select virtual processors or a set of virtual processors. More specifically, the present disclosure describes how interrupts may be provided to targeted virtual processors, regardless of where the virtual processors are currently executing. That is, when an interrupt is received, the interrupt may be delivered to a specified virtual processor regardless of which logical processor is currently hosting the virtual processor.

Abstract: A computing device runs a hypervisor that manages a watchdog timer, referred to as a hypervisor watchdog timer, for each operating system in each partition. Each hypervisor watchdog timer is re-armed at various intervals by the operating system running in the associated partition. In response to a hypervisor watchdog timer expiring, the watchdog timer resets the operating system in the associated partition. Optionally, after a threshold amount of time elapses without being re-armed, the hypervisor watchdog timer issues a non-maskable interrupt (NMI) to the operating system in the associated partition to allow the operating system to store crash data. Operation of the hypervisor watchdog timers is paused when the computing device enters a low power mode and resumes when the computing device exits the low power mode, removing any need to re-arm the hypervisor watchdog timers while the computing device is in the low power mode.

Abstract: Using a shared virtual data structure to efficiently communicate between hypervisors within a nested virtualization environment. Execution of a child hypervisor is performed that includes notifying the child hypervisor of the existence of, and how to use, the shared virtual data structure. Execution of the child hypervisor also includes performing operations at the child hypervisor, wherein at least one of the operations includes a privileged operation. The at least one privileged operation is then intercepted while control remains with the child hypervisor. In response to intercepting the at least one privileged operation, control is then transferred to the parent hypervisor. Once control has been transferred to the parent hypervisor, the parent hypervisor executes. Execution of the parent hypervisor includes both validating at least one of the operations and causing the at least one privileged operation to occur via use of content of the shared virtual data structure.

Abstract: In embodiments of adaptive idle timeout for storage devices, a computing device includes a storage device that stores data for read and write access on a rotating media. An operating system of the computing device maintains a device cycle number as an accounting of each time the storage device is powered on-off. The computing device implements a storage device driver that is implemented to obtain the device cycle number of the storage device from the operating system, and determine a projected cycle number over a duration of operational time of the storage device based on the device cycle number. The storage device driver can then determine whether the projected cycle number exceeds a maximum of power on-off cycles within a warranty period of the storage device, and control a frequency of the storage device being powered-off if the projected cycle number exceeds the maximum of power on-off cycles.

Abstract: In embodiments of adaptive idle timeout for storage devices, a computing device includes a storage device that stores data for read and write access on a rotating media. An operating system of the computing device maintains a device cycle number as an accounting of each time the storage device is powered on-off. The computing device implements a storage device driver that is implemented to obtain the device cycle number of the storage device from the operating system, and determine a projected cycle number over a duration of operational time of the storage device based on the device cycle number. The storage device driver can then determine whether the projected cycle number exceeds a maximum of power on-off cycles within a warranty period of the storage device, and control a frequency of the storage device being powered-off if the projected cycle number exceeds the maximum of power on-off cycles.

Abstract: A system and method for providing DP capabilities on a computer system is provided. The DP capabilities include hot-add and hot-replace of various hardware components such as a processor, memory, and an I/O device to the computer system. The namespace of the hardware components on a computer system is separately created and stored. Some portion of the hardware components is prevented from being recognized during an initial boot. The unrecognized hardware components can be recognized by manipulation of the namespace modules.

Abstract: The present invention facilitates access to timers in a computing device. In particular, a timer system facilitates configuring a hardware interrupt timer in a computing device, the timer being guaranteed to expire at a specific time in a non-real-time environment. A calling application passes parameters to a hardware independent application programming interface (API) to the hardware interrupt timer. The hardware independent API validates the parameters and relays them to a hardware dependent API. The hardware dependent API establishes a connection with the timer in accordance with the validated parameters, and executes a service routine associated with the application upon expiration of the timer.