Abstract: A thermal exchange breathing device is provided which include a heat exchange module 14 which is mounted in a face mask (12) with an air flow passage extending from a mouthpiece (72) through a breathing vent (64) to an atmospheric vent (68) through a heat exchange medium (68) in the heat exchange module. The face mask (12) is provided with a head strap (22,94) which may include connectors (95 and 95′) between the respective ends of the head strap and the sides of the face mask, said connectors including a stand-off (97) to keep the face mask snug against the user's face when the user wears a helmet.

Abstract: A headgear assembly including a flexible cap and an insulator adapted to increase the heat retention of the cap. The cap includes an interior surface and a peripheral edge which surround and define a hemispherical interior cavity. A sweatband is affixed to the peripheral edge of the cap and is located adjacent the interior surface of the cap. The insulator is disposed within the interior cavity of the cap and includes a peripheral edge disposed between the band and the interior surface of the cap which retains the insulator within the cap.

Abstract: A flash memory chip that can be switched into four different read modes is described. In the first read mode, asynchronous flash mode, the flash memory is read as a standard flash memory where the reading of the contents of a first address must be completed before a second address to be read can be specified. In the second read mode, synchronous flash mode, a clock signal is provided to the flash chip and a series of addresses belonging to a data burst are specified, one address per clock tick. Then, the contents stored at the addresses specified for the burst are output sequentially during subsequent clock ticks in the order in which the addresses were provided. Alternately, if a single address is provided to the flash chip when it is in the synchronous mode, the subsequent addresses for the burst will be generated within the flash chip and the data burst will then be provided as output from the flash chip.

Abstract: A method and apparatus for accessing and downloading information from the internet to a hand held computer system. The computer system includes a bus to which a processor, a display screen, input keys, and a flash memory are coupled. The flash memory stores an operating system for the computer system, search criteria, information corresponding to the search criteria downloaded from the internet, and display application software for displaying the information on the display screen.

Abstract: A headgear assembly including a flexible cap and an insulator adapted to increase the heat retention of the cap. The cap includes an interior surface and a peripheral edge which surround and define a hemispherical interior cavity. A sweatband is affixed to the peripheral edge of the cap and is located adjacent the interior surface of the cap. The insulator is disposed within the interior cavity of the cap and includes a peripheral edge disposed between the band and the interior surface of the cap which retains the insulator within the cap.

Abstract: A breathing device including a heat exchanger module retained adjacent the mouth of a user by a fabric holder. The heat exchanger module includes a wall surrounding a non-linear, tubular flow passage extending between a first air vent and a second air vent. A heat exchanging medium comprising a woven copper cloth is disposed within the flow passage. The flow passage includes a larger cross-sectional area adjacent the first air vent than adjacent the second air vent.

Abstract: An asynchronous nonvolatile memory includes a plurality of individual memory components. A burst read operation references consecutive addresses beginning with a first address, wherein the consecutive addresses are not located in a same memory component. A method of performing a burst read operation in the asynchronous nonvolatile memory includes the step of providing the first address as a current address to the plurality of individual components. A current page identified by m higher order bits of the current address is selected. Each of the individual memory components senses a location identified by the m higher order bits. An output of a selected individual memory component is enabled in accordance with n lower bits of the current address. A consecutive subsequent address is provided, wherein the current address becomes a preceding address and the consecutive subsequent address becomes the current address.