Patents by Inventor Bryan K. Choo

Bryan K. Choo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6912438
    Abstract: A system and methodology are disclosed for monitoring and controlling a semiconductor fabrication process. Measurements are taken in accordance with scatterometry based techniques of repeating in circuit structures that evolve on a wafer as the wafer undergoes the fabrication process. The measurements can be employed to generate feed forward and/or feedback control data that can utilized to selectively adjust one or more fabrication components and/or operating parameters associated therewith to adapt the fabrication process. Additionally, the measurements can be employed in determining whether to discard the wafer or portions thereof based on a cost benefit analysis, for example. Directly measuring in circuit structures mitigates sacrificing valuable chip real estate as test grating structures may not need to be formed within the wafer, and also facilitates control over the elements that actually affect resulting chip performance.
    Type: Grant
    Filed: October 21, 2002
    Date of Patent: June 28, 2005
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Bryan K. Choo, Bhanwar Singh, Ramkumar Subramanian, Bharath Rangarajan
  • Patent number: 6884999
    Abstract: The present invention provides a system and method for detecting and repairing defects in semiconductor devices. According to the invention, defects are located using a scanning probe microscope, such as an atomic force microscope or a scanning tunneling microscope, and repaired at locations determined by the scanning probe microscope. The microscope itself, and in particular the detection tip, may be employed to remove the defects. For example, the tip may be used to machine away the defect, to apply an electric field to oxidize the defect, and/or to heat the defect causing it to burn or vaporize. By combining precise defect location capabilities of a scanning probe microscope with defect removal, the invention permits very precise correction of defects such as excess material and foreign particles on semiconductor substrates.
    Type: Grant
    Filed: December 4, 2000
    Date of Patent: April 26, 2005
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Sanjay K. Yedur, Bhanwar Singh, Bryan K. Choo
  • Patent number: 6829380
    Abstract: A system for evaluating optical proximity corrected (OPC) designs is provided. The system includes an analysis system for performing measurements relating to a segment of a feature. The analysis system is configured to determine a first image for the segment of the feature based upon the measurements. The analysis system determines a second image to facilitate analysis of the first image and evaluates OPC designs based upon comparisons of the first and second image.
    Type: Grant
    Filed: August 21, 2000
    Date of Patent: December 7, 2004
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Bryan K. Choo, Bhanwar Singh, Sanjay K. Yedur
  • Publication number: 20040078108
    Abstract: A system and methodology are disclosed for monitoring and controlling a semiconductor fabrication process. Measurements are taken in accordance with scatterometry based techniques of repeating in circuit structures that evolve on a wafer as the wafer undergoes the fabrication process. The measurements can be employed to generate feed forward and/or feedback control data that can utilized to selectively adjust one or more fabrication components and/or operating parameters associated therewith to adapt the fabrication process. Additionally, the measurements can be employed in determining whether to discard the wafer or portions thereof based on a cost benefit analysis, for example. Directly measuring in circuit structures mitigates sacrificing valuable chip real estate as test grating structures may not need to be formed within the wafer, and also facilitates control over the elements that actually affect resulting chip performance.
    Type: Application
    Filed: October 21, 2002
    Publication date: April 22, 2004
    Inventors: Bryan K. Choo, Bhanwar Singh, Ramkumar Subramanian, Bharath Rangarajan
  • Patent number: 6634805
    Abstract: A system and method is provided for applying a developer to a photoresist material wafer disposed on a semiconductor substrate. The developer system and method employ a developer plate having a plurality of a apertures for dispensing developer. Preferably, the developer plate has a bottom surface with a shape that is similar to the wafer. The developer plate is disposed above the wafer and substantially and/or completely surrounds the top surface of the wafer during application of the developer. A small gap is formed between the wafer and the bottom surface of the developer plate. The wafer and the developer plate form a parallel plate pair, such that the gap can be made small enough so that the developer fluid quickly fills the gap. The developer plate is disposed in very close proximity with respect to the wafer, such that the developer is squeezed between the two plates thereby spreading evenly the developer over the wafer.
    Type: Grant
    Filed: October 10, 2001
    Date of Patent: October 21, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Michael K. Templeton, Khoi A. Phan, Bharath Rangarajan, Bryan K. Choo, Ramkumar Subramanian
  • Patent number: 6635874
    Abstract: The present invention provides SEM calibration standards, and associated SEM systems and SEM calibration methods, that are self-cleaning with respect to electron beam deposited carbon. The calibration standards have coatings containing a transition metal oxide. The coatings facilitate oxidation of deposited carbon, whereby carbon buildup can be stopped or reversed. By providing a mechanism to mitigate carbon buildup, calibration standards provided by the present invention achieve high accuracy, high durability, and low cost.
    Type: Grant
    Filed: December 4, 2000
    Date of Patent: October 21, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Bhanwar Singh, Michael K. Templeton, Sanjay K. Yedur, Bryan K. Choo
  • Patent number: 6632283
    Abstract: The present invention relates to illuminating an interior portion of a processing chamber in a semiconductor processing system. A light emitting diode is located in the chamber to illuminate the interior of the chamber to facilitate viewing the interior of the chamber.
    Type: Grant
    Filed: June 9, 2000
    Date of Patent: October 14, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Bhanwar Singh, Bharath Rangarajan, Khoi A. Phan, Bryan K. Choo, Ramkumar Subramanian
  • Patent number: 6591658
    Abstract: The present invention provides systems, methods, and standards for calibrating nano-measuring devices. Calibration standards of the invention include carbon nanotubes and methods of the invention involve scanning carbon nanotubes using nano-scale measuring devices. The widths of the carbon nanotube calibration standards are known with a high degree of accuracy. The invention allows calibration of a wide variety of nano-scale measuring devices, taking into account many, and in some cases all, of the systematic errors that may affect a nano-scale measurement. The invention may be used to accurately calibrate line width, line height, and trench width measurements and may be used to precisely characterize both scanning probe microscope tips and electron microscope beams.
    Type: Grant
    Filed: December 4, 2000
    Date of Patent: July 15, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Sanjay K. Yedur, Bhanwar Singh, Bryan K. Choo, Michael K. Templeton, Ramkumar Subramanian
  • Patent number: 6572252
    Abstract: The present invention relates to illuminating an interior portion of a processing chamber in a semiconductor processing system. A fiber optic light source is operatively associated with the processing chamber to illuminate the interior of the chamber to facilitate viewing the interior of the chamber.
    Type: Grant
    Filed: June 9, 2000
    Date of Patent: June 3, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Bharath Rangarajan, Bhanwar Singh, Khoi A. Phan, Bryan K. Choo, Ramkumar Subramanian
  • Patent number: 6566655
    Abstract: The present invention provides a system and method that facilitates measuring and imaging topographical features of a substrate, including lines and trenches having reentrant profiles. One aspect of the invention provides an electron microscope that simultaneously scans a substrate with two or more electron beams that are directed against the substrate with substantially differing angles of incidence. Secondary electrons resulting from the interaction of the substrate with the beams are detected by one or more secondary electron detectors. Each secondary electron detector may simultaneously receive secondary electrons resulting from the interaction of the substrate with two or more electron beams. In another of its aspects, the invention provides methods of analysis that permit the interpretation of such data to analyze critical dimensions and form images of the substrate. Critical dimensions that may be determined include feature heights and reentrant profile shapes.
    Type: Grant
    Filed: December 4, 2000
    Date of Patent: May 20, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Bryan K. Choo, Bhanwar Singh, Sanjay K. Yedur
  • Patent number: 6559446
    Abstract: A system and method are disclosed for measuring and/or imaging a feature having a re-entrant cross-sectional profile. Beams are emitted onto the feature and substrate at different angles during corresponding measurement intervals. An feature data set of the feature is characterized for each measurement interval. The data associated with each measurement interval are aggregated to provide a cross-sectional representation of the having dimensions proportional to the feature. As a result, a more accurate feature profile may be determined, including a cross-sectional dimension of the re-entrant feature at the juncture between the feature and substrate.
    Type: Grant
    Filed: September 27, 2000
    Date of Patent: May 6, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Bryan K. Choo, Bhanwar Singh
  • Patent number: 6516528
    Abstract: A system and method are disclosed for determining properties of a feature located at a surface of a substrate. A plurality of probe tips are operable to traverse a surface of the substrate and provide measurement data indicative of topographical features scanned thereby. The measurement data obtained from the plurality of probe tips is aggregated and processed to determine feature properties, such as may include line edge roughness and/or linewidth.
    Type: Grant
    Filed: February 26, 2001
    Date of Patent: February 11, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Bryan K. Choo, Bhanwar Singh
  • Patent number: 6507474
    Abstract: One aspect of the present invention elates to a method of reducing electrostatic charges on a patterned photoresist to improve evaluation of the developed photoresist, involving the steps of evaluating the patterned photoresist to determine if electrostatic charges exist thereon; positioning an ionizer near the patterned photoresist, the ionizer generating ions thereby reducing the electrostatic charges on the patterned photoresist; and evaluating the patterned photoresist with an electron beam.
    Type: Grant
    Filed: June 19, 2000
    Date of Patent: January 14, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Bhanwar Singh, Ramkumar Subramanian, Khoi A. Phan, Bryan K. Choo, Bharath Rangarajan
  • Patent number: 6479817
    Abstract: A measuring system and apparatus is provided in which a scanning probe microscope includes a high resolution optical sensor adapted to view a portion of a workpiece beneath the scanning probe tip. Also provided is a scanning tip assembly with a cantilever/tip assembly and an optical sensor associated with the cantilever assembly. In one embodiment, the optical sensor comprises a charge coupled device or other solid state camera associated with the cantilever and/or the tip. In addition, a scanning tip assembly is provided for a scanning probe microscope having an optical fiber adapted to receive reflected light from the at least a portion of the workpiece. Also provided is a measuring apparatus comprising a scanning probe microscope having an optical fiber adapted to receive reflected light from a feature of a workpiece, and an optical processor connected to the optical fiber to provided a visual image based on the reflected light from the feature of the workpiece.
    Type: Grant
    Filed: March 28, 2000
    Date of Patent: November 12, 2002
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Sanjay K. Yedur, Bhanwar Singh, Bryan K. Choo, Carmen L. Morales
  • Patent number: 6479820
    Abstract: In one embodiment, the present invention relates to a method of processing a photoresist on a semiconductor structure, involving the steps of exposing and developing the photoresist; evaluating the exposed and developed photoresist to determine if negative charges exist thereon; contacting the exposed and developed photoresist with a positive ion carrier thereby reducing any negative charges thereon; and evaluating the exposed and developed photoresist with an electron beam.
    Type: Grant
    Filed: April 25, 2000
    Date of Patent: November 12, 2002
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Bhanwar Singh, Ramkumar Subramanian, Bharath Rangarajan, Khoi A. Phan, Bryan K. Choo
  • Patent number: 6462343
    Abstract: A system for determining a shape of a feature is provided. The system includes an analysis system providing a signal corresponding to a scan of a portion of a surface of the feature and a stored signal corresponding to a portion of a profile of a similar feature, wherein the profile may have differing contrast levels than scanned portion of the surface of the feature. A processing system is operatively coupled to the analysis system, wherein the processing system is configured to determine the shape of the feature by positioning the signal corresponding to the surface of the feature relative to the stored signal and comparing for regions of substantially constant contrast between the two signals.
    Type: Grant
    Filed: January 23, 2001
    Date of Patent: October 8, 2002
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Bryan K. Choo
  • Patent number: 6459482
    Abstract: The present invention provides SEM systems, SEM calibration standards, and SEM calibration methods that improved accuracy in critical dimension measurements. The calibration standards have features formed with an amorphous material such as amorphous silicon. Amorphous materials lack the crystal grain structure of materials such as polysilicon and are capable of providing sharper edged features and higher accuracy patterns than grained materials. The amorphous material can be bound to a silicon wafer substrate through an intermediate layer of material, such as silicon dioxide. Where the intermediate layer is insulating material, as is silicon dioxide, the intermediate layer may be patterned with gaps to provide for electrical communication between the amorphous silicon and the silicon wafer. Charges imparted to the amorphous silicon during electron beam scanning may thereby drain to the silicon wafer rather than accumulating to a level where they would distort the electron beam.
    Type: Grant
    Filed: December 4, 2000
    Date of Patent: October 1, 2002
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Bhanwar Singh, Ramkumar Subramanian, Khoi A. Phan, Bharath Rangarajan, Michael K. Templeton, Sanjay K. Yedur, Bryan K. Choo
  • Patent number: 6455847
    Abstract: The present invention relates to a system for measuring a linewidth or profile of a feature and comprises a scanning probe microscope having a nanotube scanning tip. The nature of the nanotube scanning tip provides high resolution and accurate measurements which is generally independent of a wearing thereof. The present invention also relates to a method of measuring a linewidth of profile of a feature and comprises the steps of scanning a portion of the feature on the substrate with a scanning probe microscope comprising a nanotube scanning tip and detecting a characteristic associated with the nanotube scanning tip. The method also comprises determining a characteristic associated with the portion of the feature on the substrate based on the detected nanotube scanning tip characteristic. Lastly, the present invention relates to a method of detecting a partially open contact hole and comprises scanning a region containing the contact hole with a scanning probe microscope comprising a nanotube scanning tip.
    Type: Grant
    Filed: April 26, 2000
    Date of Patent: September 24, 2002
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Sanjay K. Yedur, Bhanwar Singh, Bryan K. Choo
  • Patent number: 6451512
    Abstract: In one embodiment, the present invention relates to a method of processing an ultrathin resist, involving the steps of depositing the ultra-thin photoresist over a semiconductor substrate, the ultra-thin resist having a thickness less than about 3,000 Å; irradiating the ultra-thin resist with electromagnetic radiation having a wavelength of about 250 nm or less; developing the ultra-thin resist; and contacting the ultra-thin resist with a silicon containing compound in an environment of at least one of ultraviolet light and ozone, wherein contact of the ultra-thin resist with the silicon containing compound is conducted between irradiating and developing the ultra-thin resist or after developing the ultra-thin resist.
    Type: Grant
    Filed: May 1, 2000
    Date of Patent: September 17, 2002
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Bharath Rangarajan, Ramkumar Subramanian, Khoi A. Phan, Bhanwar Singh, Michael K. Templeton, Sanjay K. Yedur, Bryan K. Choo
  • Patent number: 6452161
    Abstract: A measuring system and apparatus is provided in which a scanning probe microscope includes a high resolution optical sensor adapted to view a portion of a workpiece beneath the scanning probe tip. Also provided is a scanning tip assembly with a cantilever/tip assembly and an optical sensor associated with a cantilever assembly. The optical sensor may comprise a charge coupled device or other solid state camera and may be fabricated on the cantilever and/or the tip. In addition, a scanning tip assembly is provided for a scanning probe microscope having an optical fiber adapted to receive reflected light from the at least a portion of the workpiece. The scanning tip may be employed in an AFM or other scanning probe microscope, thereby providing simultaneous viewing and scanning of a workpiece surface.
    Type: Grant
    Filed: March 28, 2000
    Date of Patent: September 17, 2002
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Sanjay K. Yedur, Bhanwar Singh, Bryan K. Choo, Carmen L. Morales