Abstract: A method and apparatus for maintaining the voltage level of data signals supplied to an integrated circuit, such as a PCMCIA card, at the same level as power also provided to the integrated circuit. Circuitry for maintaining the voltages at the same level is preferably embodied within a system having a card controller integrated circuit, a power supply, and a peripheral card socket for receiving a removable PCMCIA card. The power supply is controlled by the card controller to provide power to the PCMCIA card through the card socket at a voltage level matching internal voltage requirements of the PCMCIA card. The card controller is connected directly to the PCMCIA card by a signal transmission line. Circuitry is provided for ensuring that the voltage of data signals transmitted along the data bus line to the PCMCIA card substantially match the voltage of power provided from the power supply to the PCMCIA card along a power supply line.

Abstract: A peripheral interface system and apparatus including a pair of integrated circuits, referred to as a system adapter and a socket controller, use a communication protocol, referred to as a windowed-interchip-communication protocol, to interface peripherals, such as PCMCIA cards or infrared devices, and other subsystems having different formats with a CPU system bus. The system adapter communicates to a hard disk drive subsystem using the ATA communication standards to interface an ATA hard disk drive with the CPU system bus. Communication between the system adapter and the socket controller, which communicates with PCMCIA peripheral cards and IR peripherals, is accomplished using the windowed-interchip-communication protocol which may share hardware resources with other communication protocols. Communication between the system adapter and the hard disk drive and between the system adapter and the socket controller may be provided on the same chain of a standard 40 signal ribbon cable.

Abstract: A peripheral interface system and apparatus including a pair of integrated circuits, referred to as a system adapter and a socket controller, use a communication protocol, referred to as a windowed-interchip-communication protocol, to interface peripherals, such as PCMCIA cards or infrared devices, and other subsystems having different formats with a CPU system bus. The system adapter communicates to a hard disk drive subsystem using the ATA communication standards to interface an ATA hard disk drive with the CPU system bus. Communication between the system adapter and the socket controller, which communicates with PCMCIA peripheral cards and IR peripherals, is accomplished using the windowed-interchip-communication protocol which may share hardware resources with other communication protocols. Communication between the system adapter and the hard disk drive and between the system adapter and the socket controller may be provided on the same chain of a standard 40 signal ribbon cable.

Abstract: The design and implementation of a low power CMOS bi-directional I/O buffer that translates low voltage core logic level signals into the highest logic level signals to drive the final output stage which outputs a selectable logic level signal. The buffer further translates input signals of a variety of logic levels into low voltage core logic level signals. In either case, AC and DC power consumption is minimized in a mixed power supply environment that requires voltage translation to represent the proper binary logic levels. An multivoltage I/O buffer having multiple input-receiving NOR gates is also described. The NOR gates of the multivoltage I/O buffer having triggering levels optimized for differing core voltage levels. Also described is a host adapted system for interfacing between and removable peripheral card and a host computer. The host adaptor includes an integrated circuit employing the multivoltage bi-directional I/O buffer.

Abstract: The perception of grayscale shading on a digitally commanded display is produced by commanding pixels of the display with brightness-setting signals of differing average duty cycles. Brightness-setting signals having one brightness level associated with them are phase shifted in relation to time and distributed to spaced apart pixel locations at which the one brightness level is to be produced. The energization of spatially adjacent pixels is scattered in time and pixels which are energized at the same time are selected to be spatially scattered so as to avoid the perception of visual disturbances such as flickering and surface streaming.

Abstract: The perception of grayscale shading on a digitally commanded display is produced by commanding pixels of the display with brightness-setting signals of differing average duty cycles. Brightness-setting signals having one brightness level associated with them are phase shifted in relation to time and distributed to spaced apart pixel locations at which the one brightness level is to be produced. The energization of spatially adjacent pixels is scattered in time and pixels which are energized at the same time are selected to be spatially scattered so as to avoid the perception of visual disturbances such as flickering and surface streaming.