Patents by Inventor Bryan R. Hinch

Bryan R. Hinch has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10658859
    Abstract: Circuits, methods, and apparatus that may allow an electronic device to control a power adapter. One example may provide an electronic system where an electronic device may control a power adapter through a communication channel. Data transferred in the communication channel may include the temperature of the power adapter, the charging capability of the adapter, and other types of data. In one example, power and data may share the same two wires, and the power and data may be time-division multiplexed. That is, the two wires may convey power and data at different times. Another example may include circuitry to detect a connection between the electronic device and the power adapter. Once a connection is detected, power may be transferred from the power adapter to the electronic device. This power transfer may be interrupted on occasion to transfer data between the power adapter to the electronic device.
    Type: Grant
    Filed: September 25, 2017
    Date of Patent: May 19, 2020
    Assignee: Apple Inc.
    Inventors: Eric Smith, Bryan R. Hinch, Tommee So
  • Publication number: 20200073671
    Abstract: Closed loop performance controllers of asymmetric multiprocessor systems may be configured and operated to improve performance and power efficiency of such systems by adjusting control effort parameters that determine the dynamic voltage and frequency state of the processors and coprocessors of the system in response to the workload. One example of such an arrangement includes applying hysteresis to the control effort parameter and/or seeding the control effort parameter so that the processor or coprocessor receives a returning workload in a higher performance state. Another example of such an arrangement includes deadline driven control, in which the control effort parameter for one or more processing agents may be increased in response to deadlines not being met for a workload and/or decreased in response to deadlines being met too far in advance. The performance increase/decrease may be determined by comparison of various performance metrics for each of the processing agents.
    Type: Application
    Filed: April 5, 2019
    Publication date: March 5, 2020
    Inventors: Aditya Venkataraman, Bryan R. Hinch, John G. Dorsey
  • Publication number: 20200073714
    Abstract: Closed loop performance controllers of asymmetric multiprocessor systems may be configured and operated to improve performance and power efficiency of such systems by adjusting control effort parameters that determine the dynamic voltage and frequency state of the processors and coprocessors of the system in response to the workload. One example of such an arrangement includes applying hysteresis to the control effort parameter and/or seeding the control effort parameter so that the processor or coprocessor receives a returning workload in a higher performance state. Another example of such an arrangement includes deadline driven control, in which the control effort parameter for one or more processing agents may be increased in response to deadlines not being met for a workload and/or decreased in response to deadlines being met too far in advance. The performance increase/decrease may be determined by comparison of various performance metrics for each of the processing agents.
    Type: Application
    Filed: April 5, 2019
    Publication date: March 5, 2020
    Inventors: Aditya Venkataraman, Bryan R. Hinch, John G. Dorsey
  • Publication number: 20190369693
    Abstract: In an embodiment, an electronic device includes a package power zone controller. The device monitors the overall power consumption of multiple components of a “package.” The package power zone controller may detect workloads in which the package components (e.g. different types of processors, peripheral hardware, etc.) are each consuming relatively low levels of power, but the overall power consumption is greater than a desired target. The package power zone controller may implement various mechanisms to reduce power consumption in such cases.
    Type: Application
    Filed: February 4, 2019
    Publication date: December 5, 2019
    Inventors: James S. Ismail, John M. Ananny, John G. Dorsey, Bryan R. Hinch, Aditya Venkataraman, Keith Cox, Inder M. Sodhi, Achmed R. Zahir
  • Patent number: 10417054
    Abstract: Systems and methods are disclosed for scheduling threads on a processor that has at least two different core types, such as an asymmetric multiprocessing system. Each core type can run at a plurality of selectable voltage and frequency scaling (DVFS) states. Threads from a plurality of processes can be grouped into thread groups. Execution metrics are accumulated for threads of a thread group and fed into a plurality of tunable controllers for the thread group. A closed loop performance control (CLPC) system determines a control effort for the thread group and maps the control effort to a recommended core type and DVFS state. A closed loop thermal and power management system can limit the control effort determined by the CLPC for a thread group, and limit the power, core type, and DVFS states for the system. Deferred interrupts can be used to increase performance.
    Type: Grant
    Filed: January 12, 2018
    Date of Patent: September 17, 2019
    Assignee: Apple Inc.
    Inventors: Jeremy C. Andrus, John G. Dorsey, James M. Magee, Daniel A. Chimene, Cyril de la Cropte de Chanterac, Bryan R. Hinch, Aditya Venkataraman, Andrei Dorofeev, Nigel R. Gamble, Russell A. Blaine, Constantin Pistol
  • Publication number: 20190034238
    Abstract: Systems and methods are disclosed for scheduling threads on an asymmetric multiprocessing system having multiple core types. Each core type can run at a plurality of selectable voltage and frequency scaling (DVFS) states. Threads from a plurality of processes can be grouped into thread groups. Execution metrics are accumulated for threads of a thread group and fed into a plurality of tunable controllers. A closed loop performance control (CLPC) system determines a control effort for the thread group and maps the control effort to a recommended core type and DVFS state. A closed loop thermal and power management system can limit the control effort determined by the CLPC for a thread group, and limit the power, core type, and DVFS states for the system. Metrics for workloads offloaded to co-processors can be tracked and integrated into metrics for the offloading thread group.
    Type: Application
    Filed: September 28, 2018
    Publication date: January 31, 2019
    Inventors: JOHN G. DORSEY, DANIEL A. CHIMENE, ANDREI DOROFEEV, BRYAN R. HINCH, EVAN M. HOKE, ADITYA VENKATARAMAN
  • Publication number: 20180349176
    Abstract: Systems and methods are disclosed for scheduling threads on a processor that has at least two different core types, such as an asymmetric multiprocessing system. Each core type can run at a plurality of selectable voltage and frequency scaling (DVFS) states. Threads from a plurality of processes can be grouped into thread groups. Execution metrics are accumulated for threads of a thread group and fed into a plurality of tunable controllers for the thread group. A closed loop performance control (CLPC) system determines a control effort for the thread group and maps the control effort to a recommended core type and DVFS state. A closed loop thermal and power management system can limit the control effort determined by the CLPC for a thread group, and limit the power, core type, and DVFS states for the system. Deferred interrupts can be used to increase performance.
    Type: Application
    Filed: January 12, 2018
    Publication date: December 6, 2018
    Inventors: Jeremy C. Andrus, John G. Dorsey, James M. Magee, Daniel A. Chimene, Cyril de la Cropte de Chanterac, Bryan R. Hinch, Aditya Venkataraman, Andrei Dorofeev, Nigel R. Gamble, Russell A. Blaine, Constantin Pistol
  • Publication number: 20180349191
    Abstract: Systems and methods are disclosed for scheduling threads on an asymmetric multiprocessing system having multiple core types. Each core type can run at a plurality of selectable voltage and frequency scaling (DVFS) states. Threads from a plurality of processes can be grouped into thread groups. Execution metrics are accumulated for threads of a thread group and fed into a plurality of tunable controllers. A closed loop performance control (CLPC) system determines a control effort for the thread group and maps the control effort to a recommended core type and DVFS state. A closed loop thermal and power management system can limit the control effort determined by the CLPC for a thread group, and limit the power, core type, and DVFS states for the system. Metrics for workloads offloaded to co-processors can be tracked and integrated into metrics for the offloading thread group.
    Type: Application
    Filed: June 2, 2018
    Publication date: December 6, 2018
    Inventors: JOHN G. DORSEY, DANIEL A. CHIMENE, ANDREI DOROFEEV, BRYAN R. HINCH, EVAN M. HOKE, ADITYA VENKATARAMAN
  • Publication number: 20180349182
    Abstract: Systems and methods are disclosed for scheduling threads on a processor that has at least two different core types, such as an asymmetric multiprocessing system. Each core type can run at a plurality of selectable voltage and frequency scaling (DVFS) states. Threads from a plurality of processes can be grouped into thread groups. Execution metrics are accumulated for threads of a thread group and fed into a plurality of tunable controllers for the thread group. A closed loop performance control (CLPC) system determines a control effort for the thread group and maps the control effort to a recommended core type and DVFS state. A closed loop thermal and power management system can limit the control effort determined by the CLPC for a thread group, and limit the power, core type, and DVFS states for the system. Deferred interrupts can be used to increase performance.
    Type: Application
    Filed: January 12, 2018
    Publication date: December 6, 2018
    Inventors: Jeremy C. Andrus, John G. Dorsey, James M. Magee, Daniel A. Chimene, Cyril de la Cropte de Chanterac, Bryan R. Hinch, Aditya Venkataraman, Andrei Dorofeev, Nigel R. Gamble, Russell A. Blaine, Constantin Pistol
  • Publication number: 20180349186
    Abstract: Systems and methods are disclosed for scheduling threads on a processor that has at least two different core types, such as an asymmetric multiprocessing system. Each core type can run at a plurality of selectable voltage and frequency scaling (DVFS) states. Threads from a plurality of processes can be grouped into thread groups. Execution metrics are accumulated for threads of a thread group and fed into a plurality of tunable controllers for the thread group. A closed loop performance control (CLPC) system determines a control effort for the thread group and maps the control effort to a recommended core type and DVFS state. A closed loop thermal and power management system can limit the control effort determined by the CLPC for a thread group, and limit the power, core type, and DVFS states for the system. Deferred interrupts can be used to increase performance.
    Type: Application
    Filed: January 12, 2018
    Publication date: December 6, 2018
    Inventors: Jeremy C. Andrus, John G. Dorsey, James M. Magee, Daniel A. Chimene, Cyril de la Cropte de Chanterac, Bryan R. Hinch, Aditya Venkataraman, Andrei Dorofeev, Nigel R. Gamble, Russell A. Blaine, Constantin Pistol
  • Publication number: 20180349175
    Abstract: Systems and methods are disclosed for scheduling threads on a processor that has at least two different core types, such as an asymmetric multiprocessing system. Each core type can run at a plurality of selectable voltage and frequency scaling (DVFS) states. Threads from a plurality of processes can be grouped into thread groups. Execution metrics are accumulated for threads of a thread group and fed into a plurality of tunable controllers for the thread group. A closed loop performance control (CLPC) system determines a control effort for the thread group and maps the control effort to a recommended core type and DVFS state. A closed loop thermal and power management system can limit the control effort determined by the CLPC for a thread group, and limit the power, core type, and DVFS states for the system. Deferred interrupts can be used to increase performance.
    Type: Application
    Filed: January 12, 2018
    Publication date: December 6, 2018
    Inventors: Jeremy C. Andrus, John G. Dorsey, James M. Magee, Daniel A. Chimene, Cyril de la Cropte de Chanterac, Bryan R. Hinch, Aditya Venkataraman, Andrei Dorofeev, Nigel R. Gamble, Russell A. Blaine, Constantin Pistol, James S. Ismail
  • Publication number: 20180013296
    Abstract: Circuits, methods, and apparatus that may allow an electronic device to control a power adapter. One example may provide an electronic system where an electronic device may control a power adapter through a communication channel. Data transferred in the communication channel may include the temperature of the power adapter, the charging capability of the adapter, and other types of data. In one example, power and data may share the same two wires, and the power and data may be time-division multiplexed. That is, the two wires may convey power and data at different times. Another example may include circuitry to detect a connection between the electronic device and the power adapter. Once a connection is detected, power may be transferred from the power adapter to the electronic device. This power transfer may be interrupted on occasion to transfer data between the power adapter to the electronic device.
    Type: Application
    Filed: September 25, 2017
    Publication date: January 11, 2018
    Applicant: Apple Inc.
    Inventors: Eric Smith, Bryan R. Hinch, Tommee So
  • Patent number: 9774207
    Abstract: Circuits, methods, and apparatus that may allow an electronic device to control a power adapter. One example may provide an electronic system where an electronic device may control a power adapter through a communication channel. Data transferred in the communication channel may include the temperature of the power adapter, the charging capability of the adapter, and other types of data. In one example, power and data may share the same two wires, and the power and data may be time-division multiplexed. That is, the two wires may convey power and data at different times. Another example may include circuitry to detect a connection between the electronic device and the power adapter. Once a connection is detected, power may be transferred from the power adapter to the electronic device. This power transfer may be interrupted on occasion to transfer data between the power adapter to the electronic device.
    Type: Grant
    Filed: September 15, 2014
    Date of Patent: September 26, 2017
    Assignee: APPLE INC.
    Inventors: Eric Smith, Bryan R. Hinch, Tommee So
  • Publication number: 20150130422
    Abstract: Circuits, methods, and apparatus that may allow an electronic device to control a power adapter. One example may provide an electronic system where an electronic device may control a power adapter through a communication channel. Data transferred in the communication channel may include the temperature of the power adapter, the charging capability of the adapter, and other types of data. In one example, power and data may share the same two wires, and the power and data may be time-division multiplexed. That is, the two wires may convey power and data at different times. Another example may include circuitry to detect a connection between the electronic device and the power adapter. Once a connection is detected, power may be transferred from the power adapter to the electronic device. This power transfer may be interrupted on occasion to transfer data between the power adapter to the electronic device.
    Type: Application
    Filed: September 15, 2014
    Publication date: May 14, 2015
    Applicant: APPLE INC.
    Inventors: Eric Smith, Bryan R. Hinch, Tommee So
  • Patent number: 8836287
    Abstract: Circuits, methods, and apparatus that may allow an electronic device to control a power adapter. One example may provide an electronic system where an electronic device may control a power adapter through a communication channel. Data transferred in the communication channel may include the temperature of the power adapter, the charging capability of the adapter, and other types of data. In one example, power and data may share the same two wires, and the power and data may be time-division multiplexed. That is, the two wires may convey power and data at different times. Another example may include circuitry to detect a connection between the electronic device and the power adapter. Once a connection is detected, power may be transferred from the power adapter to the electronic device. This power transfer may be interrupted on occasion to transfer data between the power adapter to the electronic device.
    Type: Grant
    Filed: November 1, 2011
    Date of Patent: September 16, 2014
    Assignee: Apple Inc.
    Inventors: Eric Smith, Bryan R. Hinch, Tommee So
  • Publication number: 20120280563
    Abstract: Circuits, methods, and apparatus that may allow an electronic device to control a power adapter. One example may provide an electronic system where an electronic device may control a power adapter through a communication channel. Data transferred in the communication channel may include the temperature of the power adapter, the charging capability of the adapter, and other types of data. In one example, power and data may share the same two wires, and the power and data may be time-division multiplexed. That is, the two wires may convey power and data at different times. Another example may include circuitry to detect a connection between the electronic device and the power adapter. Once a connection is detected, power may be transferred from the power adapter to the electronic device. This power transfer may be interrupted on occasion to transfer data between the power adapter to the electronic device.
    Type: Application
    Filed: November 1, 2011
    Publication date: November 8, 2012
    Applicant: Apple Inc.
    Inventors: Eric Smith, Bryan R. Hinch, Tommee So