Patents by Inventor Bryce Horine

Bryce Horine has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070274656
    Abstract: In some embodiments a printed circuit board is fabricated using printed circuit board material, and a waveguide is formed that is contained within the printed circuit board material. Other embodiments are described and claimed.
    Type: Application
    Filed: December 30, 2005
    Publication date: November 29, 2007
    Inventors: Gary Brist, Bryce Horine, Stephen Hall
  • Patent number: 7301424
    Abstract: According to some embodiments, a waveguide cable includes a dielectric core and a conducting layer surrounding the dielectric core. A first antenna may be provided at a first end of the waveguide cable to receive a digital signal and to propagate an electromagnetic wave through the dielectric core. A second antenna may be provided at a second end of the waveguide cable, opposite the first end, to receive the electromagnetic wave from the dielectric core and to provide the digital signal.
    Type: Grant
    Filed: June 29, 2005
    Date of Patent: November 27, 2007
    Assignee: Intel Corporation
    Inventors: Ricardo Suarez-Gartner, Stephen Hall, Bryce Horine, Anusha Moonshiram
  • Publication number: 20070235214
    Abstract: A printed circuit board structure includes a plurality of layers. The plurality of layers includes at least one metal layer or partial metal layer and at least one dielectric layer of a first type. The plurality of layers also includes two dielectric layers of a second type that is different from the first type. The at least one dielectric layer of the first type is between the two dielectric layers of the second type. The dielectric layers of the second type have a moisture absorption characteristic not in excess of 0.1%.
    Type: Application
    Filed: March 30, 2006
    Publication date: October 11, 2007
    Inventors: Stephen Hall, Bryce Horine, Gary Brist, Howard Heck
  • Publication number: 20070223205
    Abstract: An article of manufacture includes a circuit board and a pair of traces on or in the circuit board. The pair of traces includes a first trace and a second trace. The first trace includes a first segment and a second segment continuously joined to the first segment. The first segment coincides with a first longitudinal axis. The second trace includes a first segment that runs alongside the first segment of the first trace. The second trace also includes a second segment that runs alongside the second segment of the first trace. The second segment of the second trace is continuously joined to the first segment of the second trace. The second segment of the second trace coincides with the first longitudinal axis.
    Type: Application
    Filed: March 21, 2006
    Publication date: September 27, 2007
    Inventors: Tao Liang, Stephen Hall, Howard Heck, Gary Brist, Bryce Horine
  • Patent number: 7271680
    Abstract: A method, system, and apparatus for high data rate parallel plate mode signaling.
    Type: Grant
    Filed: June 29, 2005
    Date of Patent: September 18, 2007
    Assignee: Intel Corporation
    Inventors: Stephen Hall, Tao Liang, Howard Heck, Bryce Horine, Gary Brist
  • Publication number: 20070154156
    Abstract: In some embodiments a channel is formed by combining two imprinted subparts each made of printed circuit board material and the imprinted subparts are laminated to form a waveguide. Other embodiments are described and claimed.
    Type: Application
    Filed: December 30, 2005
    Publication date: July 5, 2007
    Inventors: Gary Brist, Bryce Horine, Stephen Hall
  • Publication number: 20070154155
    Abstract: In some embodiments a channel is formed in printed circuit board material, the formed channel is plated to form at least two side walls of an embedded waveguide, and printed circuit board material is laminated to the plated channel. Other embodiments are described and claimed.
    Type: Application
    Filed: December 30, 2005
    Publication date: July 5, 2007
    Inventors: Gary Brist, Bryce Horine, Stephen Stephen
  • Publication number: 20070145595
    Abstract: In some embodiments a high speed interconnect includes a layer of FR4 material, a trench in the layer of FR4 material, and a pair of transmission lines located near the trench. The trench is filled with a homogenous material. Other embodiments are described and claimed.
    Type: Application
    Filed: December 27, 2005
    Publication date: June 28, 2007
    Inventors: Stephen Hall, Bryce Horine, Gary Brist, Howard Heck
  • Publication number: 20070110388
    Abstract: A method of making a printed circuit board panel, a printed circuit board panel made according to the method, and a system incorporating a printed circuit board provided onto the panel. The printed circuit board panel has a panel top edge, a panel bottom edge parallel to the panel top edge, and two parallel panel side edges, and further includes a first set of fiber bundles extending at the predetermined angle with respect to the panel side edges, and a second set of fiber bundles extending at the predetermined angle with respect to the panel top edge.
    Type: Application
    Filed: November 17, 2005
    Publication date: May 17, 2007
    Inventors: William Alger, Gary Long, Gary Brist, Bryce Horine
  • Publication number: 20070001907
    Abstract: A method, system, and apparatus for high data rate parallel plate mode signaling.
    Type: Application
    Filed: June 29, 2005
    Publication date: January 4, 2007
    Inventors: Stephen Hall, Tao Liang, Howard Heck, Bryce Horine, Gary Brist
  • Publication number: 20070001789
    Abstract: According to some embodiments, a waveguide cable includes a dielectric core and a conducting layer surrounding the dielectric core. A first antenna may be provided at a first end of the waveguide cable to receive a digital signal and to propagate an electromagnetic wave through the dielectric core. A second antenna may be provided at a second end of the waveguide cable, opposite the first end, to receive the electromagnetic wave from the dielectric core and to provide the digital signal.
    Type: Application
    Filed: June 29, 2005
    Publication date: January 4, 2007
    Inventors: Ricardo Suarez-Gartner, Stephen Hall, Bryce Horine, Anusha Moonshiram
  • Publication number: 20060148281
    Abstract: In some embodiments an apparatus includes a board, a package coupled to the board, and a flex cable coupled to the package and extending between the board and the package. Other embodiments are described and claimed.
    Type: Application
    Filed: December 30, 2004
    Publication date: July 6, 2006
    Inventors: Bryce Horine, Gary Brist
  • Publication number: 20060123371
    Abstract: A method and apparatus for reducing timing skew between conductor traces. A dielectric medium made of a resin reinforced with a fabric is provided. The fabric includes a first plurality of yarns running parallel to a first axis and a second plurality of yarns running parallel to a second axis. The first plurality of yarns are separated by a first weave pitch and the second plurality of yarns separated by a second weave pitch. At least two conductor traces are formed on the dielectric medium. The conductor traces are positioned on the dielectric medium such that the conductor traces each have substantially similar effective dielectric constants.
    Type: Application
    Filed: December 14, 2005
    Publication date: June 8, 2006
    Inventors: Gary Brist, Gary Long, William Alger, Carlos Mejia, Bryce Horine
  • Patent number: 7043706
    Abstract: A method and apparatus for reducing timing skew between conductor traces. A dielectric medium made of a resin reinforced with a fabric is provided. The fabric includes a first plurality of yarns running parallel to a first axis and a second plurality of yarns running parallel to a second axis. The first plurality of yarns are separated by a first weave pitch and the second plurality of yarns separated by a second weave pitch. At least two conductor traces are formed on the dielectric medium. The conductor traces are positioned on the dielectric medium such that the conductor traces each have substantially similar effective dielectric constants.
    Type: Grant
    Filed: March 11, 2003
    Date of Patent: May 9, 2006
    Assignee: Intel Corporation
    Inventors: Gary A. Brist, Gary B. Long, William O. Alger, Carlos Mejia, Bryce Horine
  • Patent number: 6803527
    Abstract: A circuit board apparatus and a method for a circuit board. An embodiment of a circuit board includes a first layer and a second layer; a substrate between the first layer and the second layer; a first surface mount device pad on the first layer of the substrate; a first via, the first via being formed partially or wholly through a first end of the first surface mount device pad, the first via passing through the substrate between the first layer and the second layer; a second surface mount device pad adjacent to the first surface mount device pad; and a second via, the second via being formed partially or wholly through a first end of the second surface mount device pad, the second via passing through the substrate, the first end of the first surface mount device pad being the end of the first surface mount device pad that is the farthest from the first end of the second surface mount device pad.
    Type: Grant
    Filed: March 26, 2002
    Date of Patent: October 12, 2004
    Assignee: Intel Corporation
    Inventors: Terrance J. Dishongh, Bryce Horine
  • Publication number: 20040181764
    Abstract: A method and apparatus for reducing timing skew between conductor traces. A dielectric medium made of a resin reinforced with a fabric is provided. The fabric includes a first plurality of yarns running parallel to a first axis and a second plurality of yarns running parallel to a second axis. The first plurality of yarns are separated by a first weave pitch and the second plurality of yarns separated by a second weave pitch. At least two conductor traces are formed on the dielectric medium. The conductor traces are positioned on the dielectric medium such that the conductor traces each have substantially similar effective dielectric constants.
    Type: Application
    Filed: March 11, 2003
    Publication date: September 16, 2004
    Inventors: Gary A. Brist, Gary B. Long, William O. Alger, Carlos Mejia, Bryce Horine
  • Patent number: 6429383
    Abstract: A circuit board includes electrical interconnect mounting pads for mounting electronic devices thereto. Some of the electrical interconnect mounting pads include a plated through hole which traverses through the circuit board. One end of the plated through holes is closed, plugged or covered to prevent migration of solder through the plated through holes during a solder operation. The reduction in solder migration, as a result of plugging the plated through hole, increases solder joint quality over solder joint quality achieved using plated through holes which are not closed at one end.
    Type: Grant
    Filed: April 14, 1999
    Date of Patent: August 6, 2002
    Assignee: Intel Corporation
    Inventors: John T. Sprietsma, Steve Joy, Bryce Horine